AZ -Onsite Citizenship: US Citizen required Experience: 15-20 years Job Description The Electrical Engineer designs, tests and documents safety-critical hardware. Responsible for developing and supporting FPGA/CPLD designs through all phases of design and system integration for high-reliability embedded aerospace and ground based vehicle systems applications. Responsibilities: Perform activities such as requirements generation, design, RTL-synthesis More ❯
collaborators to achieve consensus for design and testability as per product requirements. Designs solutions for errors, stats & configuration appropriate to CPU, GPU, DIMM, SSDs, NICs, IB, PSU, BMC, FPGA, CPLD etc. for enterprise readiness of NVIDIA Server platforms. Actively work with whole org to Instruments code to ensure maximum code coverage, writing and automating unit tests for each implemented module More ❯
skills: FPGA firmware development, experience in Interfaces such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages – Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to More ❯
Engineering, Computer Science or equivalent discipline. • Experience of designing FPGA IP cores or sub-systems. • Designing FPGA architectures from a technical specification. • Design with AMD/Intel FPGA and CPLD devices. • Using VHDL/Verilog HDL languages for FPGA design. • Implementing high speed, multi-frequency clocking architectures. • Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA More ❯
roles). Beneficial Skills to have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA More ❯
