9 of 9 Field-Programmable-Gate-Array Jobs in London

C++ developer to be part of the low latency development team. The team provides industry leading low-latency trading services for our clients, utilizing FPGA, C++ and Java technologies. The candidate will be focusing on the C++ components. The ideal candidate: Is motivated by working in a high performing team ...

within a finance (or games) environment You have a good understanding of low level system design, Operating Systems, Networking, Socket Level programming, hardware, compilers, FPGA You achieved a 2.1 or above in Computer Science from a top tier university You are collaborative and pragmatic with great communication and stakeholder management ...

within a finance (or games) environment You have a good understanding of low level system design, Operating Systems, Networking, Socket Level programming, hardware, compliers, FPGA You achieved a 2.1 or above in Computer Science from a top tier university You are collaborative and pragmatic with great communication and stakeholder management ...

within a finance (or games) environment You have a good understanding of low level system design, Operating Systems, Networking, Socket Level programming, hardware, compliers, FPGA You achieved a 2.1 or above in Computer Science from a top tier university You are collaborative and pragmatic with great communication and stakeholder management ...

trading environments. Proficient in Rust Experience with SQL databases. Familiarity with functional and component testing. Experience in crypto exchange connectivity and/or FPGA technologies is a plus. Knowledge of gRPC and Node.js interaction is strongly preferred. Experience in High-Frequency Options Trading or low-latency options systems is advantageous ...

FPGA Engineer – London A high-performance technology-driven company is building out a brand-new FPGA team in London to develop cutting-edge, latency-sensitive platforms that underpin critical real-time decision-making. This is a rare opportunity to join a small, high-impact team with end-to-end ownership … design, optimisation, and architecture on large, complex FPGA systems. As an FPGA Engineer, you'll work on high-throughput, resource-efficient designs involving PCIe, high-speed serial interfaces, and external memory—balancing power, area, and timing in performance-critical environments. You'll collaborate with software and ASIC teams and play ...

looking for a Principal FPGA Design Engineer to lead complex FPGA developments from system requirements through to fully verified hardware. This is a senior, hands-on technical leadership role within a high-performance engineering team. Key Responsibilities Lead FPGA architecture and end-to-end VHDL design Define system-level requirements … plans, and documentation Support and enhance existing firmware Lead design reviews and release activities Mentor junior engineers and provide technical leadership Requirements Ten years FPGA design experience Proven experience with multi-FPGA systems Strong system architecture and requirements decomposition skills Experience with Radar or DSP applications ...

Design Engineer Job Overview: Responsible for the decomposition of top-level system or product requirements into an implementable FPGA architecture. If you are considering sending an application, make sure to hit the apply button below after reading through the entire description. Responsible for FPGA developments from preliminary specification to verified … running on the target hardware. Provide expert knowledge of electronic design, test and certification of systems based around advanced FPGAs. In conjunction with the FPGA Engineering Manager, provide coaching, leadership, and guidance to other Design Engineers. Employment: Contractor. Hourly Pay Rate: Competitive (depending on experience). Job Functions (Essential ...

A pioneering technology company is seeking a Chief Electronic Engineer to lead the evolution of an industry-defining AI-powered electronics design platform. This is a rare opportunity for an experienced hardware engineer to shape ...