1 to 25 of 31 Field-Programmable-Gate-Array Jobs in London

Comfortable working both independently and collaboratively in a small, multidisciplinary team. Desirable skills: Experience with real-time audio DSP or audio networking (e.g. Dante, AVB, AES67). Knowledge of FPGA design (e.g. Verilog/VHDL). Understanding of manufacturing processes and design for production. 68000 Assembly language experience. Passion for audio, music technology, or live sound applications. Benefits: Life Assurance More ❯

Engineering , Electrical Engineering , Physics , or a related field. 5+ years of professional experience in software development, with a focus on C++ and/or Rust . Strong understanding of FPGA architectures , toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages ( VHDL/Verilog ). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

design and verification methodologies Experience with AMS/Low Power verification techniques and verifying mixed signal ICs a plus. Good knowledge of EDA tools. Experience with signal processing and FPGA based prototyping a plus. Compensation decisions are made based on factors including experience, skills, education, and other job-related factors, in accordance with our internal pay structure. We also offer More ❯

design and verification methodologies Experience with AMS/Low Power verification techniques and verifying mixed signal ICs a plus. Good knowledge of EDA tools. Experience with signal processing and FPGA based prototyping a plus. Compensation decisions are made based on factors including experience, skills, education, and other job-related factors, in accordance with our internal pay structure. We also offer More ❯

networking. Familiarity with Linux internals, NUMA, CPU affinity, and custom memory management. Proven track record of building latency-critical systems in trading, gaming, or telecom environments. Bonus: Experience with FPGA acceleration, RDMA, or custom NIC firmware. Why Apply? Work with some of the fastest systems and smartest minds in the industry. Direct impact on trading performance and strategy execution. Access More ❯

Senior Hardware Engineer (Linux Python) London to £150k Do you have expertise with low level Linux and hardware management? You could be progressing your career in a senior, hands-on role at a global systematic trading firm with $25 billion More ❯

concepts clearly and credibly Desirable * Experience with phased array, radar, satcom or electronic warfare systems * Knowledge of mixed-signal or digital-RF interfaces (ADC/DAC integration, FPGA control) * Familiarity with defence and aerospace compliance standards (MIL-STD, DO-160, DEF-STAN) * Experience in technical consultancy or customer-facing engineering environments More ❯

including Multicast (IGMP, PIM), L2/L3, and WAN design. Expert in routing protocols such as BGP and OSPF. Experience with Arista, Cisco, including Layer 1 switches. Knowledge of FPGA and high-performance computing technologies is a plus. Strong understanding of time synchronization protocols, including Precision Time Protocol (PTP, WR) and PPS, and their role in low-latency environments. Experience More ❯

FPGA ENGINEER – ULTRA-LOW LATENCY SYSTEMS Location: London (Hybrid: 4 days onsite) Sector: Quant Trading/High-Performance Computing Industry leading compensation Quant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute infrastructure integrated directly into trading, research, and … networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co-design tightly coupled platforms Contributing to tooling, flow, and potentially DSL extensions … in improving hardware workflows or applying high-level techniques Bonus Background in trading systems, signal processing, or networking Experience with formal verification and/or hardware DSLs Knowledge of FPGA-based networking acceleration Why Join? Build from scratch with a team driving real strategy and architectural decisions Work across the full lifecycle, from concept to deployment Deep technical ownership, minimal More ❯

FPGA ENGINEER – ULTRA-LOW LATENCY SYSTEMS Location: London (Hybrid: 4 days onsite) Sector: Quant Trading/High-Performance Computing Industry leading compensation Quant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute infrastructure integrated directly into trading, research, and … networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co-design tightly coupled platforms Contributing to tooling, flow, and potentially DSL extensions … in improving hardware workflows or applying high-level techniques Bonus Background in trading systems, signal processing, or networking Experience with formal verification and/or hardware DSLs Knowledge of FPGA-based networking acceleration Why Join? Build from scratch with a team driving real strategy and architectural decisions Work across the full lifecycle, from concept to deployment Deep technical ownership, minimal More ❯

design and work package control Root cause and target areas of improvement , focusing on failure reduction and MDBF Knowledge of supporting a production program Desirable Experience of PLD/FPGA design Requirements management tools, e.g. DOORS Work-package management tools, eg. MSP, JIRA, etc. More ❯

monitoring using Prometheus and Grafana. Experience with version control repositories (Bitbucket/Github) and CI/CD tools. Understanding of networking fundamentals. Experience with cloud services, AWS preferred. Plusses FPGA card Majority of career in high-frequency trading Experience supporting market data feeds More ❯

monitoring using Prometheus and Grafana. Experience with version control repositories (Bitbucket/Github) and CI/CD tools. Understanding of networking fundamentals. Experience with cloud services, AWS preferred. Plusses FPGA card Majority of career in high-frequency trading Experience supporting market data feeds More ❯

Greetings, We are hiring for a Senior IP Design Engineer Position in Cambridge OR London OR Milton Keynes, UK DOE The candidate's resume must highlight relevant Adaptive SoC, FPGA, and protocol experience. Scope of Work The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. More ❯

Greetings, We are hiring for a Senior IP Design Engineer Position in Cambridge OR London OR Milton Keynes, UK DOE The candidate's resume must highlight relevant Adaptive SoC, FPGA, and protocol experience. Scope of Work The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs More ❯

Position: FPGA Engineer Compensation: Base salary of £100,000 + performance bonuses Location: London, UK. Company Insight Step into the forefront of quantitative and systematic investment management as an FPGA Engineer. Operating globally across diverse liquid asset classes, we combine cutting-edge technology and data-driven methodologies to deliver unparalleled returns for investors. The firm is looking for a dynamic … FPGA Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for More ❯

Position: FPGA Engineer Compensation: Base salary of £100,000 + performance bonuses Location: London, UK. Company Insight Step into the forefront of quantitative and systematic investment management as an FPGA Engineer. Operating globally across diverse liquid asset classes, we combine cutting-edge technology and data-driven methodologies to deliver unparalleled returns for investors. The firm is looking for a dynamic … FPGA Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for More ❯

work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog for high-performance FPGA/Adaptive SoC designs Implementing and optimizing high-speed connectivity protocols Collaborating with cross-functional teams on integration, timing closure, and validation Driving improvements across synthesis, place and route, and … Experience The proposed candidate must meet the following qualifications: A. RTL Design & Coding Deep hands-on experience with SystemVerilog HDL for RTL design Proven ability to develop IP targeting FPGA/Adaptive SoC platforms B. High-Speed Protocols Strong experience with: 100Gb Ethernet PCIe Gen5 AMBA/AXI interface protocols C. Adaptive SoC/FPGA Expertise In-depth understanding of … FPGA/Adaptive SoC development flows, including: Synthesis Place and route Timing analysis and closure D. AMD Toolchain Experience Hands-on experience with AMD Vivado/Vitis tools and associated flows E. Scripting & Automation Proficiency in scripting: Python , Tcl Able to automate design, build, and verification workflows Comfortable with Git for CI/CD integration Deliverables RTL IP blocks developed More ❯

work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog for high-performance FPGA/Adaptive SoC designs Implementing and optimizing high-speed connectivity protocols Collaborating with cross-functional teams on integration, timing closure, and validation Driving improvements across synthesis, place and route, and … Experience The proposed candidate must meet the following qualifications: A. RTL Design & Coding Deep hands-on experience with SystemVerilog HDL for RTL design Proven ability to develop IP targeting FPGA/Adaptive SoC platforms B. High-Speed Protocols Strong experience with: 100Gb Ethernet PCIe Gen5 AMBA/AXI interface protocols C. Adaptive SoC/FPGA Expertise In-depth understanding of … FPGA/Adaptive SoC development flows, including: Synthesis Place and route Timing analysis and closure D. AMD Toolchain Experience Hands-on experience with AMD Vivado/Vitis tools and associated flows E. Scripting & Automation Proficiency in scripting: Python , Tcl Able to automate design, build, and verification workflows Comfortable with Git for CI/CD integration Deliverables RTL IP blocks developed More ❯

Greetings, We are hiring for a Senior IP Design Engineer Position in Cambridge OR London OR Milton Keynes, UK DOE The candidate's resume must highlight relevant Adaptive SoC, FPGA, and protocol experience. Scope of Work The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. … Responsibilities include: Developing RTL in SystemVerilog for high-performance FPGA/Adaptive SoC designs Implementing and optimizing high-speed connectivity protocols Collaborating with cross-functional teams on integration, timing closure, and validation Driving improvements across synthesis, place and route, and timing flows Supporting CI/CD development workflows using Git and scripting automatio Required Skills & Experience The proposed candidate must … meet the following qualifications: A. RTL Design & Coding Deep hands-on experience with SystemVerilog HDL for RTL design Proven ability to develop IP targeting FPGA/Adaptive SoC platforms B. High-Speed Protocols Strong experience with: 100Gb Ethernet PCIe Gen5 AMBA/AXI interface protocols C. Adaptive SoC/FPGA Expertise In-depth understanding of FPGA/Adaptive SoC development More ❯

Senior FPGA Hardware Engineer (Linux Python) London to £150k Do you have expertise with low level Linux and hardware management? You could be progressing your career in a senior, hands-on role at a global systematic trading firm with $25 billion under management, earning significant bonuses. As a Senior FPGA Hardware Engineer you will collaborate with the research and trading … financial services or big tech environment with large scale systems You're collaborative and have technical leadership skills and experience What's in it for you: As a Senior FPGA Hardware Engineer you will earn a competitive package: Salary to £150k Significant Bonus Pension Private Healthcare 25 days holiday Opportunity to work on Greenfield systems at the cutting Continual learning … and development opportunities Apply now to find out more about this Senior FPGA Hardware Engineer (Linux Python) opportunity. At Client Server we believe in a diverse workplace that allows people to play to their strengths and continually learn. We're an equal opportunities employer whose people come from all walks of life and will never discriminate based on race, colour More ❯

Healthcare 25 days holiday Opportunity to work on Greenfield systems at the cutting Continual learning and development opportunities Apply now to find out more about this Senior Hardware Engineer (FPGA Linux Python) opportunity. At Client Server we believe in a diverse workplace that allows people to play to their strengths and continually learn. We're an equal opportunities employer whose More ❯

Do you want to work on some of the most advanced technology in the world? Our client operates one of the most powerful private HPC clusters globally, with 10s of thousands of GPUs (including 1000s of A100s), 100s of petabytes More ❯