1 to 25 of 49 Field-Programmable-Gate-Array Jobs in London

Engineering , Electrical Engineering , Physics , or a related field. 5+ years of professional experience in software development, with a focus on C++ and/or Rust . Strong understanding of FPGA architectures , toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages ( VHDL/Verilog ). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband). More ❯

Engineering , Electrical Engineering , Physics , or a related field. 5+ years of professional experience in software development, with a focus on C++ and/or Rust . Strong understanding of FPGA architectures , toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages ( VHDL/Verilog ). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband). More ❯

Engineering , Electrical Engineering , Physics , or a related field. 5+ years of professional experience in software development, with a focus on C++ and/or Rust . Strong understanding of FPGA architectures , toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages ( VHDL/Verilog ). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband). More ❯

Engineering , Electrical Engineering , Physics , or a related field. 5+ years of professional experience in software development, with a focus on C++ and/or Rust . Strong understanding of FPGA architectures , toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages ( VHDL/Verilog ). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

development. Collaborate with cross-functional teams including physicists and engineers to ensure seamless integration of hardware and software components for robust product software systems. Technical Expectations Strong understanding of FPGA architectures, toolchains (e.g., Xilinx Vivado, Intel Quartus), and hardware description languages (VHDL/Verilog). Experience with high-speed data centre and GPU interfaces (e.g., PCIe, Ethernet, Infiniband, Tofu). More ❯

We are looking for a C++ developer to be part of the low latency development team. The team provides industry leading low-latency trading services for our clients, utilizing FPGA, C++ and Java technologies. The candidate will be focusing on the C++ components. The ideal candidate: Is motivated by working in a high performing team, Is flexible to change of More ❯

networking. Familiarity with Linux internals, NUMA, CPU affinity, and custom memory management. Proven track record of building latency-critical systems in trading, gaming, or telecom environments. Bonus: Experience with FPGA acceleration, RDMA, or custom NIC firmware. Why Apply? Work with some of the fastest systems and smartest minds in the industry. Direct impact on trading performance and strategy execution. Access More ❯

networking. Familiarity with Linux internals, NUMA, CPU affinity, and custom memory management. Proven track record of building latency-critical systems in trading, gaming, or telecom environments. Bonus: Experience with FPGA acceleration, RDMA, or custom NIC firmware. Why Apply? Work with some of the fastest systems and smartest minds in the industry. Direct impact on trading performance and strategy execution. Access More ❯

IP networking and experience building high-throughput, low-latency network applications. Proven track record of developing real-time, high-performance systems (finance, gaming, or similar). Beneficial: Experience with FPGA/ASIC development for hardware acceleration. Beneficial: Exposure to AI/ML integration in performance-sensitive environments. Bonus: Familiarity with kernel bypass technologies (DPDK, RDMA, Solarflare, etc.) . Why Join More ❯

IP networking and experience building high-throughput, low-latency network applications. Proven track record of developing real-time, high-performance systems (finance, gaming, or similar). Beneficial: Experience with FPGA/ASIC development for hardware acceleration. Beneficial: Exposure to AI/ML integration in performance-sensitive environments. Bonus: Familiarity with kernel bypass technologies (DPDK, RDMA, Solarflare, etc.) . Why Join More ❯

IP networking and experience building high-throughput, low-latency network applications. Proven track record of developing real-time, high-performance systems (finance, gaming, or similar). Beneficial: Experience with FPGA/ASIC development for hardware acceleration. Beneficial: Exposure to AI/ML integration in performance-sensitive environments. Bonus: Familiarity with kernel bypass technologies (DPDK, RDMA, Solarflare, etc.) . Why Join More ❯

IP networking and experience building high-throughput, low-latency network applications. Proven track record of developing real-time, high-performance systems (finance, gaming, or similar). Beneficial: Experience with FPGA/ASIC development for hardware acceleration. Beneficial: Exposure to AI/ML integration in performance-sensitive environments. Bonus: Familiarity with kernel bypass technologies (DPDK, RDMA, Solarflare, etc.) . Why Join More ❯

concepts clearly and credibly Desirable * Experience with phased array, radar, satcom or electronic warfare systems * Knowledge of mixed-signal or digital-RF interfaces (ADC/DAC integration, FPGA control) * Familiarity with defence and aerospace compliance standards (MIL-STD, DO-160, DEF-STAN) * Experience in technical consultancy or customer-facing engineering environments More ❯

research, engineering, and product teams. Desirables: Experience in MLOps/LLMOps (MLflow, Kubeflow, Weights & Biases, experiment tracking). Exposure to video processing, compression, or neural rendering pipelines. Knowledge of FPGA/embedded deployment Contributions to open-source GPU/ML/DevOps projects. If this sounds of interest, please apply or reach out to daniel@microtech-global.com for more information More ❯

research, engineering, and product teams. Desirables: Experience in MLOps/LLMOps (MLflow, Kubeflow, Weights & Biases, experiment tracking). Exposure to video processing, compression, or neural rendering pipelines. Knowledge of FPGA/embedded deployment Contributions to open-source GPU/ML/DevOps projects. If this sounds of interest, please apply or reach out to daniel@microtech-global.com for more information More ❯

FPGA ENGINEER – ULTRA-LOW LATENCY SYSTEMS Location: London (Hybrid: 4 days onsite) Sector: Quant Trading/High-Performance Computing Industry leading compensation Quant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute infrastructure integrated directly into trading, research, and … networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co-design tightly coupled platforms Contributing to tooling, flow, and potentially DSL extensions … in improving hardware workflows or applying high-level techniques Bonus Background in trading systems, signal processing, or networking Experience with formal verification and/or hardware DSLs Knowledge of FPGA-based networking acceleration Why Join? Build from scratch with a team driving real strategy and architectural decisions Work across the full lifecycle, from concept to deployment Deep technical ownership, minimal More ❯

FPGA ENGINEER – ULTRA-LOW LATENCY SYSTEMS Location: London (Hybrid: 4 days onsite) Sector: Quant Trading/High-Performance Computing Industry leading compensation Quant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute infrastructure integrated directly into trading, research, and … networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co-design tightly coupled platforms Contributing to tooling, flow, and potentially DSL extensions … in improving hardware workflows or applying high-level techniques Bonus Background in trading systems, signal processing, or networking Experience with formal verification and/or hardware DSLs Knowledge of FPGA-based networking acceleration Why Join? Build from scratch with a team driving real strategy and architectural decisions Work across the full lifecycle, from concept to deployment Deep technical ownership, minimal More ❯

FPGA ENGINEER – ULTRA-LOW LATENCY SYSTEMS Location: London (Hybrid: 4 days onsite) Sector: Quant Trading/High-Performance Computing Industry leading compensation Quant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute infrastructure integrated directly into trading, research, and … networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co-design tightly coupled platforms Contributing to tooling, flow, and potentially DSL extensions … in improving hardware workflows or applying high-level techniques Bonus Background in trading systems, signal processing, or networking Experience with formal verification and/or hardware DSLs Knowledge of FPGA-based networking acceleration Why Join? Build from scratch with a team driving real strategy and architectural decisions Work across the full lifecycle, from concept to deployment Deep technical ownership, minimal More ❯

FPGA ENGINEER – ULTRA-LOW LATENCY SYSTEMS Location: London (Hybrid: 4 days onsite) Sector: Quant Trading/High-Performance Computing Industry leading compensation Quant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute infrastructure integrated directly into trading, research, and … networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co-design tightly coupled platforms Contributing to tooling, flow, and potentially DSL extensions … in improving hardware workflows or applying high-level techniques Bonus Background in trading systems, signal processing, or networking Experience with formal verification and/or hardware DSLs Knowledge of FPGA-based networking acceleration Why Join? Build from scratch with a team driving real strategy and architectural decisions Work across the full lifecycle, from concept to deployment Deep technical ownership, minimal More ❯

design and work package control Root cause and target areas of improvement , focusing on failure reduction and MDBF Knowledge of supporting a production program Desirable Experience of PLD/FPGA design Requirements management tools, e.g. DOORS Work-package management tools, eg. MSP, JIRA, etc. More ❯

Senior FPGA Engineer – Cutting-Edge Sensor Technology Up to £75,000 DOE Join a forward-thinking engineering team developing next-generation sensor and signal-processing technology used in advanced industrial and scientific applications. We’re seeking an experienced Senior FPGA Engineer who enjoys hands-on design and ownership of the full FPGA development lifecycle from concept through to deployment. You … ll be part of a collaborative, close-knit R&D group , where your technical input genuinely shapes product innovation. What You’ll Do Lead FPGA design and development in VHDL or Verilog , from architecture through verification and test Work with ADC/DAC-based signal processing and high-speed data paths Implement and optimize communication interfaces SPI, I2C, UART, RS … links Collaborate with hardware, firmware, and systems engineers across the full product lifecycle Contribute to continuous improvement of design flows and methodologies What You’ll Bring 4+ years of FPGA design experience in a commercial or R&D environment Proven skills in VHDL or Verilog for FPGA development Solid understanding of signal-processing architectures and high-speed serial interfaces Experience More ❯

Position: FPGA Engineer Compensation: Base salary of £100,000 + performance bonuses Location: London, UK. Company Insight Step into the forefront of quantitative and systematic investment management as an FPGA Engineer. Operating globally across diverse liquid asset classes, we combine cutting-edge technology and data-driven methodologies to deliver unparalleled returns for investors. The firm is looking for a dynamic … FPGA Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for More ❯