3 of 3 IP Engineer Jobs

Job Title: Senior IP Design Engineer Location: Cambridge OR London OR Milton Keynes (Hybrid- 1-2 Days) Duration: Fixed term contract Job Overview: Scope of Work The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog … Required Skills & Experience The proposed candidate must meet the following qualifications: A. RTL Design & Coding Deep hands-on experience with SystemVerilog HDL for RTL design Proven ability to develop IP targeting FPGA/Adaptive SoC platforms B. High-Speed Protocols Strong experience with: 100Gb Ethernet PCIe Gen5 AMBA/AXI interface protocols C. Adaptive SoC/FPGA Expertise In … and associated flows E. Scripting & Automation Proficiency in scripting: Python, Tcl Able to automate design, build, and verification workflows Comfortable with Git for CI/CD integration Deliverables RTL IP blocks developed in SystemVerilog according to project specification Timing-closed design implementations for target Adaptive SoCs Documentation for IP integration and usage Scripts and automation to support CI More ❯

Job Title: Senior IP Design Engineer Location: Cambridge OR London OR Milton Keynes (Hybrid- 1-2 Days) Duration: Fixed term contract Job Overview: Scope of Work The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP targeting AMD Adaptive SoCs. Responsibilities include: Developing RTL in SystemVerilog More ❯

Greetings, We are hiring for a Senior IP Design Engineer Position in Cambridge OR London OR Milton Keynes, UK DOE The candidate's resume must highlight relevant Adaptive SoC, FPGA, and protocol experience. Scope of Work The selected engineer will work closely with internal architecture, RTL, verification, and integration teams to design, implement, and optimize IP More ❯