8 of 8 Verification Engineer Jobs in Cambridgeshire

Senior Design Verification Engineer - CPU / SoC

Hiring Organisation
European Tech Recruit
Location
Cambridge, England, United Kingdom
Senior Design Verification Engineer - CPU/SoC We are currently partnered with an industry leading semiconductor giant in the UK looking to expand their team with an experienced Design Verification Engineer to join a high caliber team of engineers working on high-performance CPUs … global users. This is a permanent position based in Cambridge - please note this is a full onsite role. Key responsibilities for this Senior Design Verification Engineer position: Work with SOC Architects to validate high-level system requirements and micro-architectural concepts. Develop detailed Test and Coverage plans ...

CPU Design Verification Engineer - CPU DV / Microprocessor Verification / SystemVerilog / UVM

Hiring Organisation
European Tech Recruit
Location
Cambridgeshire, England, United Kingdom
Design Verification Engineer - CPU DV/Microprocessor Verification/SystemVerilog/UVM We are partnered with a global semiconductor company with a major engineering presence in Cambridge. They are looking for a CPU Design Verification Engineer to work on high performance CPU and SoC products … designs are fully verified and launch ready for end products. You will be involved early in the development lifecycle and have real influence on verification strategy, methodology, and overall design quality. What You Will Be Doing: Working with CPU and SoC Architects to understand architectural concepts and high level ...

Senior Verification Engineer - Highspeed Networking

Hiring Organisation
La Fosse Associates Limited
Location
Cambridge, Cambridgeshire, United Kingdom
Employment Type
Contract
Contract Rate
GBP 600 - 800 Daily
Senior Verification Engineer - High-Speed Networking A leader in the design, development manufacturer of Semiconductor, Datacentre equipment & high-performance infrastructure & applications are seeking a senior verification engineer to support the high-speed networking function within the engineering team. The focus of the role will … building and maintaining sophisticated, class-based UVM verification environments, driving coverage closure, and supporting SoC-level integration. This role involves close collaboration with design, architecture, software and systems teams to deliver production-ready silicon for demanding networking applications. Key Responsibilities Verify high-speed connectivity IP using advanced SystemVerilog ...

Senior Design Verification Engineer

Hiring Organisation
IC Resources
Location
Cambridge, England, United Kingdom
Senior Design Verification Engineer UK Remote This is a fantastic opportunity to join a start-up who are just over 2 years old, as they make technological breakthroughs in security with a product line built on CHERI technology and RISC‐V cores. They have strong funding behind them … With huge growth plans across the Silicon Design team this is a fantastic time to join the business! I am looking for a talented Verification Engineer to join a rapidly growing stealth mode start-up. The successful candidate will play a key role in the verification ...

Design Verification Engineer

Hiring Organisation
European Tech Recruit
Location
Cambridgeshire, England, United Kingdom
Senior CPU Design Verification Engineer - Cambridge (Onsite) We are supporting a leading semiconductor technology organisation developing next-generation CPUs, GPUs, and low-power SoC platforms used across high-performance computing, consumer electronics, and wearable devices. Role Responsibilities Work closely with CPU and SoC Architects to understand architectural concepts … system-level requirements Develop detailed verification strategies, test plans, and coverage models Build scalable and reusable verification environments, including stimulus, checkers, assertions, trackers, and coverage Execute verification plans covering design bring-up, regression, and debug Track and report verification progress using coverage, bug metrics, and feature ...

Staff Verification Engineer

Hiring Organisation
European Tech Recruit
Location
Cambridgeshire, England, United Kingdom
Senior/Staff Formal Verification Engineer – GPU - Cambridge (5 days onsite) About the Role An industry-leading technology company is expanding its GPU verification organisation and is seeking experienced Formal Verification Engineers to work on next-generation graphics and compute hardware used in billions of devices … Responsibilities Develop a deep understanding of GPU and graphics-related hardware pipelines, including data paths, block functionality, and interfaces Define and execute Formal Property Verification (FPV) strategies and test plans Develop assertion-based verification environments using SystemVerilog Assertions (SVA) Debug RTL issues and drive formal sign ...

CPU Design Verification Engineer

Hiring Organisation
European Tech Recruit
Location
Cambridge, Cambridgeshire, UK
concepts and system-level requirements Define detailed test and coverage plans based on CPU architecture and micro-architecture specifications Develop and maintain scalable, reusable verification methodologies across projects and environments Build and own verification environments, including stimulus, checkers, assertions, scoreboards, trackers, and coverage models Develop verification plans … testbenches for your assigned functional domain Execute verification plans, including design bring-up, DV environment bring-up, regression enablement, and debug of test failures Track and report verification progress using metrics such as coverage closure and bug status Mentor and technically guide junior verification engineers and contribute ...

CPU Design Verification Engineer

Hiring Organisation
European Tech Recruit
Location
Cambridge, England, United Kingdom
concepts and system-level requirements Define detailed test and coverage plans based on CPU architecture and micro-architecture specifications Develop and maintain scalable, reusable verification methodologies across projects and environments Build and own verification environments, including stimulus, checkers, assertions, scoreboards, trackers, and coverage models Develop verification plans … testbenches for your assigned functional domain Execute verification plans, including design bring-up, DV environment bring-up, regression enablement, and debug of test failures Track and report verification progress using metrics such as coverage closure and bug status Mentor and technically guide junior verification engineers and contribute ...