development Responsible of maintenance of FPGA toolkit (Vivado) Participate to the design of filters and high speed ADC A requirement for VHDL. Knowledge of Verilog is preferable. How to apply Apply now with your up to date CV! If this role isn't right for you, do you know someone more »
and experience which include; Experience in CPU/GPU design. Experience of CPU, DSP, FPU architectures or debug and testing methodologies. Experience of System Verilog for design and/or verification. Experience or knowledge of place and route methodologies. Experience of UVM Experience of C, SystemC, C++, Python, Perl, TCL. more »
design work Deep learning frameworks, PyTorch, TensorFlow C/C++, Python Desirable MLOps, including model training, quantisiation, sparsity, model preprocessing etc. ML Compiler stack Verilog/RTL designs What’s on offer? £80-120,000 (depending on experience and technical match) amongst other benefits Hybrid working Interested? This is a more »
strong motivation to be part of a revolutionary start-up. Previous experience within the field of AI. Experience leading elements of projects. Expertise in Verilog, System VerilogAs a start-up you can expect a competitive salary paying up to £120,000 (depending on experience and technical match) amongst other benefits. more »
