Senior PLD/ FPGA Engineer
Rochester, Medway, South East
BAE Systems
and techniques Experience of working in an FPGA development team Desirable: Experience of digital hardware design for FPGA using VHDL Experience and knowledge of video processing and control law algorithms Working knowledge and experience of UVM (Universal Verification Methodology) constrained random verification Benefits: You'll receive benefits including more ยป
Employment Type: Permanent
Salary: £45,000 - £55,000
Posted: