1 to 19 of 19 Permanent Senior Verification Engineer Jobs

Senior Verification Engineer - Lower Saxony - leading optical communications company A global leader in opto-electronic applications for industrial, optical communications, aerospace and defence, life sciences, semiconductor and consumer market and offices in multiple countries is looking for a Senior Verification Engineer for one of … their design centres in Northern Germany. The Senior Verification Engineer will contribute to the development of high-speed System-on-Chip devices in latest CMOS technology for industry-leading optical products including transceivers, transponders and ROADM products. The successful Senior Verification Engineer has the … qualifications: Master’s degree (Dipl.-Ing.) or PhD in electrical engineering or computer science Minimum 5 years of experience in ASIC development Expertise in verification methodologies & tools Strong knowledge of UVM Excellent programming skills in hardware description languages (e.g. SystemVerilog) Good programming skills in scripting languages (e.g. Python, Perl more »

Senior Verification & Validation Engineer Cambridgeshire £40k - £55k (dep on exp) + bonus and excellent benefits! A fantastic opportunity for a Senior Verification & Validation Engineer has arisen at a Cambridge based cutting edge leading medical device development company whose innovative technology is reshaping the medical … life science and diagnostics sectors! You will be leading the verification and validation activities for this groundbreaking and market disruptive point-of-care diagnostics device! As the Senior Verification & Validation Engineer, you will use your previous experience in product development within a regulated environment to draft … global release of this product, you will need to adhere to the requirements of medical device regulations – ISO 13485/FDA environments. As the Senior Verification & Validation Engineer, your responsibilities will include: Lead the planning of verification activities for the system, including both the Instrument and more »

We are seeking a Senior Verification Engineer to join a market-leading Semiconductor IP company developing on-chip network technology. This role can be based in California or Austin, TX. Our client, still relatively young, is experiencing huge demand for their technology. They have achieved massive revenue … growth year-over-year, and are now hiring for a Senior Verification Engineer with cache coherency experience to own verification activities on high performance, low power designs for a major new project. The role will involve working on some of the world's most sophisticated SoC … designs within areas such as autonomous driving and machine learning. The Senior Verification Engineer will be responsible for advanced UVM based testbench development and owning RTL verification test/coverage at system level. The Design Verification Engineer will be a UVM expert, capable of more »

Join one of the world's foremost RISC-V companies as a Senior Verification Engineer, contributing to the development of cutting-edge CPU products for applications such as 5G, AI, and machine learning. As a top company they offer competitive compensation, benefits, and full remote working options … d like to visit the office). There is huge room for professional growth while they are expanding, through skill sets and promotions. The Senior Verification Engineer will become part of a worldwide CPU team, you will analyse CPU architecture and micro-architecture implementations to devise optimal … verification strategies. Responsibilities: Lead hands-on verification regression management, debugging, and functional verification. Implement code coverage and Formal proofs. Generate comprehensive verification reports. Mentor and guide junior members of the Verification team. Requirement: A BSc/MSc degree in Computer Engineering or similar Proven experience in more »

Cambridge based Start-up looking for CPU Verification Engineer . CPU Verification - ML/AI This is an exciting join an extremely well-funded machine learning start-up based in Cambridge as a CPU Verification Engineer. Having opened doors to new offices in North Cambridge last … year, my client is creating brand-new AI acceleration hardware and software for edge devices. To continue their ongoing expansion, they now seek a Senior CPU Verification Engineer who can drive the pre-silicon Verification of CPU and VPU designs. The Senior CPU Verification Engineer will have the opportunity to work closely with designers and architects to develop and ensure high quality test plans, functional coverage and scenarios. You will use simulation and formal verification methodologies to execute test plans and scenarios. You will join a newly created team in Cambridge more »

Senior Verification Engineer - Join an innovative international semiconductor company - North Rhine-Westphalia This is an exciting opportunity to join an innovative semiconductor company, Dortmund. An innovative scale-up company, my client specialises in high-speed bus transfer in wireless communications and are already challenging established tech giants … within the industry. This is a great opportunity for an experienced verification engineer, who is looking for the opportunity to take on responsibilities as a technical lead. The key skills needed in this role include: Prepare design verification plan based on design specifications. Develop design verification more »

Senior Verification Engineer - Leading Semiconductor Company - Edinburgh or Newbury One of the world’s leading mixed-signal Semiconductor companies is looking for a Formal Verification Engineer to join their team. This role can either be based in Edinburgh or Newbury. This is an exciting opportunity … to join an established international semiconductor company with over 40 years’ experience, as they look to expand their Verification team. Bachelors or Masters in Electronic Engineering or a related field Experience with UVM/OVM Experience with System Verilog and System Verilog Assertions Strong Debugging skills For more information more »

Are you looking for the next step in your career in UVM Verification? Would you like to learn from skilled experts in a friendly and growing environment with exciting projects? If the answer is yes, then this may be the perfect opportunity for you! I have a key requirement … for an experienced/senior Verification Engineer - to work for an established company based in the Grenoble area - who focus on design and verification services for a number of major clients. As the senior verification engineer, you will be responsible for R&D … projects and the development of verification environments (SystemVerilog/UVM/…), VIP components and giving training to other engineers. Technical skills 3-5+ years' IP or SoC verification experience Confident knowledge with SystemVerilog and UVM methodology SoC architecture Bus communication protocols knowledge - AMBA/AXI etc. OOP more »

Senior Verification & Validation Engineer Cambridgeshire £40k - £55k (dep on exp) + bonus and excellent benefits! A fantastic opportunity for a Senior Verification & Validation Engineer has arisen at a Cambridge based cutting edge leading medical device development company whose innovative technology is reshaping the medical more »

Senior Verification & Validation Engineer Cambridgeshire £40k - £55k (dep on exp) + bonus and excellent benefits! A fantastic opportunity for a Senior Verification & Validation Engineer has arisen at a Cambridge based cutting edge leading medical device development company whose innovative technology is reshaping the medical more »

CPU Verification Engineer – Senior Or Principal levels Multi UK locations Growing UK Division I am looking for Verification Engineers at Senior or Principal level to join my clients fast-growing CPU Hardware team. They are expanding their CPU IP development from internal use to support … market-leading chips and deliver significant impact to the future success of their wider team. You will: Be responsible for the delivery of all verification activities related to a CPU component or sub-system from early stages of verification planning to sign-off Create verification plans, develop … and maintain testbench components, Track and report verification metrics and closure Participate in all stages of design specification definition providing feedback from the verification perspective Be able to influence and advance CPU verification methodology Have excellent knowledge of SystemVerilog and UVM You might also have: Experience leading more »

Senior Verification Engineer (UVM) We are working with a world-leading technology company who are looking to grow their team in Cambridge, UK with experienced Verification Engineers. This will be a full-time permanent position, offering above market compensation, and where required we can provide relocation … and visa support. You will play a key role in developing hardware verification testbenches for next-gen hardware IP. In particular, we are looking for individuals with experience of complex IP/module level designs. The successful candidate should demonstrate the following: Strong knowledge of hardware verification languages … SystemVerilog) along with assembly, C/C++ and scripting. Experience in various verification methodologies, ideally UVM. Exposure to all stages of verification including requirements collection, test plans, testbench implementation, test case development etc. Experience with complex IP/block/module level designs. Fluency in English. more »

Senior Verification Engineer (UVM) We are working with a world-leading technology company who are looking to grow their team in Cambridge, UK with experienced Verification Engineers. This will be a full-time permanent position, offering above market compensation, and where required we can provide relocation … and visa support. You will play a key role in developing hardware verification testbenches for next-gen hardware IP. In particular, we are looking for individuals with experience of complex IP/module level designs. The successful candidate should demonstrate the following: Strong knowledge of hardware verification languages … SystemVerilog) along with assembly, C/C++ and scripting. Experience in various verification methodologies, ideally UVM. Exposure to all stages of verification including requirements collection, test plans, testbench implementation, test case development etc. Experience with complex IP/block/module level designs. Fluency in English. more »

FPGA/Embedded System Engineer We think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading CPU and System IP products, that … ability to apply your RTL design skills using SystemVerilog for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc. … Tcl, Make, bash etc will also be required.. Required Skills and Experience: Proven experience of delivering RTL designs in a SoC or FPGA. RTL Verification at both unit and system level, using SV including SVA. Experience of ASIC or FPGA synthesis tools. Unix/Linux skills including shell programming more »

FPGA/Embedded System Engineer We think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading CPU and System IP products, that … ability to apply your RTL design skills using SystemVerilog for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc. … Tcl, Make, bash etc will also be required.. Required Skills and Experience: Proven experience of delivering RTL designs in a SoC or FPGA. RTL Verification at both unit and system level, using SV including SVA. Experience of ASIC or FPGA synthesis tools. Unix/Linux skills including shell programming more »

BRAND NEW ROLE, BRAND NEW TEAM, BRAND NEW COMPANY COMING TO PORTUGAL FOR THE FIRST TIME!!!*** Exciting opportunity for a Senior Digital IC Verification Engineer, to work in the beautiful setting of Portugal - in either Porto or Lisbon. Our client is one of the world’s fastest … They are a billion dollar turnover company with enormous growth and development plans - so business is thriving for them! They are now seeking multiple Senior Digital IC Verification Engineers to help build a brand new team in their new design centre. Role: UVM and System Verilog Verification. Verification Metrics definition, Coverage analysis and debugging skills. Knowledge and experience on setting up an ASIC Verification environment, methodology and flow. vManager, vPlan and Regressions, etc. Digital Test Plan definition/creating/set-up test benches Knowledge of analog/mixed-signal (AMS) environments is a bonus Knowledge more »

I am seeking an AMS Verification Engineer to join a global organisation based in Italy. You will have the chance to contribute to verifying the functionality and performance of Analog and Mixed-Signal designs. Key responsibilities will include, but are not limited to: Developing verification plans for … AMS designs. Implementing and executing verification tests. Collaborating with design engineers to identify and resolve design issues. Performing functional and performance verification of analog and mixed-signal circuits. Developing and maintaining verification infrastructure and automation scripts. Analysing and debugging simulation failures. Documenting verification procedures, results, and … findings. Participating in periodic reporting, design reviews, internal seminars, and training sessions.To be considered for this role, you must possess proven IC verification experience and a strong understanding of tools such as Cadence or Synopsys. For further information, please contact Parm Shergill. more »

Exciting opportunity to work on the latest cutting edge RISC-V technology in the semiconductor industry. In this new role as digital verification engineer you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, ARM & CPU architecture, PCIe protocols and machine learning. … I am looking to speak with digital verification engineers with 5+ years of experience - who have the following skills: Required: Masters or PHD degree in Electronics/Microelectronics or similar field 5+ years' experience in UVM environments & process ASIC/FPGA development System Verilog for IP/SOC Verification of digital ICs/ASIC IP or chips complex ASIC designs & architecture for advanced technology nodes Verification Metrics definition, Coverage analysis and debugging skills. Knowledge and experience on setting up an ASIC Verification environment, methodology and flow. vManager, vPlan and Regressions, etc. Digital Test Plan definition/ more »

the Randstad area of The Netherlands. Excellent salary available, benefits and shares: The ideal candidate will have a mixture of digital design and digital verification experience over the last 5+ years. Bachelor/Masters/PHD in Electronic Engineering or similar field ASIC knowledge of complex tape-out projects more »