Remote Permanent Senior Verification Engineer Jobs

5 Permanent Senior Verification Engineer Jobs with Remote Work Options

Senior Verification Engineer

San Jose, Santa Clara County, California
Hybrid / WFH Options
IC Resources
Join one of the world's foremost RISC-V companies as a Senior Verification Engineer, contributing to the development of cutting-edge CPU products for applications such as 5G, AI, and machine learning. As a top company they offer competitive compensation, benefits, and full remote working options … d like to visit the office). There is huge room for professional growth while they are expanding, through skill sets and promotions. The Senior Verification Engineer will become part of a worldwide CPU team, you will analyse CPU architecture and micro-architecture implementations to devise optimal … verification strategies. Responsibilities: Lead hands-on verification regression management, debugging, and functional verification. Implement code coverage and Formal proofs. Generate comprehensive verification reports. Mentor and guide junior members of the Verification team. Requirement: A BSc/MSc degree in Computer Engineering or similar Proven experience in more »
Employment Type: Permanent
Posted:

Senior Verification Engineer - (Hardware/Software/AI) - Sites across Europe - Visas Supported

England, United Kingdom
Hybrid / WFH Options
European Recruitment
Verification Engineer A fantastic opportunity for a passionate Verification Engineer to join an international Deep-Tech Semiconductor Company, where you will contribute to the verification of a game-changing hardware and software platform for AI at the edge. You will take ownership for the definition … and implementation of verification and test plans and the match of specifications and requirements. Onsite at locations in The Netherlands, Italy, Belgium, UK or Fully Remote in Europe Your role Guarantee RTL designs are matching specifications and requirements Define and implement verification plans and test plans to ensure … the designs meet quality and performance goals Build and maintain automated verification environments Collaborate and communicate with management regarding verification status, project progress, and issue resolution Provide customer level 3 technical support for the implemented design Provide proper and comprehensive documentation for the usage and the architecture of more »
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Senior Digital IC Verification Engineer - (RISC-V AI) - Fully Remote

Remote work
Hybrid / WFH Options
IC Resources
the AI market - combining ultra low power for pattern recognition and image sensing components to develop cutting edge IP is looking to hire a Senior Digital IC/SOC Verification Engineer. As Digital IC verification Engineer you will be part of the design team, and responsible … realization of energy-efficient mixed-signal neuromorphic processors/SoCs for AI at the sensor edge. The team is looking for a staff/senior Digital SoC Verification Engineer to implement the verification methodology, and execute the verification plan ensuring that their processors/SoCs … the team members, in collaboration with our international team(s) The ideal candidates for this position will have: Delivered with (as applicable) SoC design verification, SystemVerilog languages (UVM, SVA, SFC), low power verification (UPF methodology), software/hardware co-verification (SystemC/C/C++), Interfaced with more »
Employment Type: Permanent
Posted:

Senior Design Verification Engineer

Cambridge, England, United Kingdom
Hybrid / WFH Options
Connected Consulting Limited
FPGA/Embedded System Engineer We think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading CPU and System IP products, that … ability to apply your RTL design skills using SystemVerilog for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc. … Tcl, Make, bash etc will also be required.. Required Skills and Experience: Proven experience of delivering RTL designs in a SoC or FPGA. RTL Verification at both unit and system level, using SV including SVA. Experience of ASIC or FPGA synthesis tools. Unix/Linux skills including shell programming more »
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Senior Design Verification Engineer

Ely, England, United Kingdom
Hybrid / WFH Options
Connected Consulting Limited
Job DescriptionFPGA/Embedded System EngineerWe think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading CPU and System IP products, that target … ability to apply your RTL design skills using SystemVerilog for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc.You … Python, Tcl, Make, bash etc will also be required.. Required Skills and Experience: Proven experience of delivering RTL designs in a SoC or FPGA.RTL Verification at both unit and system level, using SV including SVA.Experience of ASIC or FPGA synthesis tools.Unix/Linux skills including shell programming/scripting more »
Posted:
Senior Verification Engineer
Median
£75,000
75th Percentile
£77,500
90th Percentile
£82,000