19 Permanent Synopsys Jobs

e.g. C++) Experience with the implementation of ASIC/SoC RTL in FPGA SV UVM test benches, using UVM Verification IPs Xilinx FPGA technology. Synopsys tool flows. If you have the required experience and want to be part of a team that helps build innovative products that impact millions of more »

conductor/Semi-conductor/GPU/SystemVerilog/System Verilog Assertions/Property Specification Language/Cadence/JasperGold/Siemens EDA/Synopsys If you are interested in this Formal Verification Engineer position, please send a CV to ts@eu-recruit.com By applying to this role you understand more »

flow synthesis, STA, test insertion, MBIST, formality, GDS layout etcExperience in EDA tools for custom IC development like Siemens Questa for simulation and verification, Synopsys DesignCompiler for synthesis and STA, Spyglass for linting, etc.Experience in writing IP design specifications and block level modulesGood knowledge of UVM, SVA, VIP, and UPF more »

Job DescriptionFPGA/Embedded System EngineerWe think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading more »

synthesis, STA, test insertion, MBIST, formality, GDS layout etc Experience in EDA tools for custom IC development like Siemens Questa for simulation and verification, Synopsys DesignCompiler for synthesis and STA, Spyglass for linting, etc. Experience in writing IP design specifications and block level modules Good knowledge of UVM, SVA, VIP more »

at wafer- and package-level; A good understanding of statistical analysis and design of experiments; Knowledge of semiconductor TCAD tools for device simulation, i.e. Synopsys Sentaurus, Silvaco Victory; Background in electronics engineering for system understanding in the field of power electronics. Excellent problem-solving skills – able to identify problems and more »

Background in design, implementation and timing convergence is a plus Experience in leading datacenter SOCs is a plus. Experience with Cadence, and/or Synopsys DFT and simulation tools Salary Range: From:$283,305 To: $383,295 In Return: At Arm, we are proud to have a set of behaviors more »

gate level verification, silicon debug, memory and scan diagnostics. Experience coding Verilog RTL, TCL and/or Perl Experience with Cadence, and/or Synopsys DFT and simulation tools "Nice To Have" Skills and Experience : Familiarity with SoC style architectures including multi-clock domain and low power design practices. Previous more »

Memory BIST, Logic BIST, JTAG, IJTAG, fault simulation, debug, verification, designing and conducting experiments/tool evaluations. Experience with Siemens, Cadence and/or Synopsys DFT tools "Nice To Have" Skills and Experience : Ability to build and deploy generic DFT flows Familiarity with IEEE standards such as 1500, 1149.1 more »

flow from RTL2GDSII Background in digital electronic and signal processing Experience working in Mixed- Signal IC’s is highly desirable Experience with Cadence or Synopsys tools Must be able to communicate fluently in EnglishThis client also has also has several other sites in France so location won’t be an more »

of digital hardware descriptive languages such as VHDL or Verilog Experience working in Mixed- Signal IC’s is highly desirable Experience with Cadence or Synopsys tools Must be able to communicate fluently in English (oral and written)This client also has several other sites in France so location won’t more »

architecture Tools/Technologies Verilog, SystemVerilog, Perl Shell scripting, Python, Sage, Tcl C, C++ MATLAB, Xilinx Vivado Unix, Linux Front-end ASIC design tools - synopsys/cadence/mentorExcellent salary, bonus, stocks/shares, visa sponsorship and relocation bonus are all available for this fantastic opportunity with a fantastic employer. more »

ICs such as A/D Converters, D/A Converters, and/or RF transceivers is a plus Good knowledge of Cadence or Synopsys RTL design tools A previous experience with FPGA is a plus You are a team player with a critical attitude and sense of initiative You more »

high-speed designs, knowledge of STA tools (e.g. PrimeTime), hardware design for asynchronous logic Good experience in hardware implementation, using tools such as Cadence, Synopsys & Xilinx Experience in ASIC/FPGA/SoC system-level/top-level integration, DfT Knowledge of AI/RISC-V or similar CPU processors more »

knowledge in both Analog and Digital design Fluent English Highly motivated Learning abilities Good communication Preferred Qualifications Work with external vendors Experience in both Synopsys and Cadence tools is an advantage SKILL programming experiencePlease contact Parm Shergill to discuss further. more »

development, electronic design automation (EDA) area, algorithm development or a related technical area Proficiency with SPICE-simulators (e.g., SIMetrix, Orcad PSpice, LTspice, Cadence Spectre, Synopsys HSPICE, Siemens EDA AFS, etc.) Good programming skills with focus on C++/C A deep understanding of electronic devices and their applications Understanding in more »

techniques Self-motivation with excellent interpersonal and problem-solving skills Some hands-on experience with SPICE-simulators (e.g.,SIMetrix, Orcad PSpice, LTspice, Cadence Spectre, Synopsys HSPICE,Siemens EDA AFS, etc.) or simulation frameworks (e.g., MATLAB/Simulink,COSIDE, etc.) Excellent spoken and written communication skills in English, German language skills more »

I am seeking an AMS Verification Engineer to join a global organisation based in Italy. You will have the chance to contribute to verifying the functionality and performance of Analog and Mixed-Signal designs. Key responsibilities will include, but are more »

documentation. Tools/Technologies Verilog, SystemVerilog, Perl Shell scripting, Python, Sage, Tcl C, C++ MATLAB, Xilinx Vivado Unix, Linux Front-end ASIC design tools - synopsys/cadence/mentor Excellent salary, bonus, stocks/shares, visa sponsorship and relocation bonus are all available for this fantastic opportunity with a fantastic more »