Cambridge, England, United Kingdom Hybrid / WFH Options
European Recruitment
working on microprocessor designs. Expereince working with CPU/GPU technology is highly beneficial. Keywords: Design Engineer/RTL Design/System Verilog/SystemVerilog/CPU/GPU/Microprocessors/Microarchitecture/Computer Architecture/Semiconductor If you are interested in this Design Engineer position, please send a more »
problems. Main Responsibilities Develop digital designs for custom IC integration – this would take the form of writing IP design specifications and coding Verilog and SystemVerilog models for simulation, synthesis and static timing analysis, creating testbenches and writing automated build scripts for simulation and verification. Build automated pre-silicon verification environment … science/electronic engineering or equivalent Proven record in digital IC design and verification for ASIC implementation Strong RTL coding skills in Verilog and SystemVerilog with ability to write testbenches for simulation Good knowledge of clock and reset scheme and power domain structure Good knowledge of industry-standard interface technology more »
working with scripting languages like Python, Tcl, Make files, bash etc. Required Skills and Experience : Excellent theoretical and practical experience of RTL Verification utilising SystemVerilog, including SVA. Proficiency in C programming plus, ideally, some grounding in assembly language (ideally Arm assembler) and object-orientated coding (e.g. C++) Skilled in simulation more »
Verification Engineer | CPU | RTL/UVM/SystemVerilog Location: Cambridge, UK We are recruiting Verification Engineers of all seniorities to work for a world-leading Semiconductor Company on topics including the development of next-generation industry-leading CPU and GPU processors. The company is able to support visas and relocation … A minimum of 3 years of experience working in verification environments for complex RTL designs. Knowledgeable in the use of hardware verification languages; eg, SystemVerilog or Specman. Experience working with verification methodologies such as UVM. Previous experience working on microprocessor designs. Experience working with assembly languages, and/or C … send your CV to george@eu-recruit.com Keywords: Verification/Semiconductor/Semiconductor/Semi-conductor/CPU/GPU/System Verilog/SystemVerilog/Specman/UVM/Universal Verification Methodology/Microprocessor/Microprocessor/C/C++ By applying to this role you understand that we more »
Physical Design Implementation Engineer (m/f/d) - CPU/RTL/STA/Verilog/System Verilog As a physical implementation engineer, you will join the successful team that has enabled huge volumes of next-generation high-efficiency more »
Verification Engineer - Semiconductor/UVM/SystemVerilog We are recruiting Verification Engineers of all seniorities to work for a global leader in the semiconductor industry specializing in the development of cutting-edge next-generation CPU and GPU processors. This is a permanent working opportunity based in Cambridge, UK. Key responsibilities … Requirements: A minimum of 3 years’ experience working in verification environments for complex RTL designs. Knowledgeable in the use of hardware verification languages; eg, SystemVerilog or Specman. Deep understanding of end-to-end verification processes. Experience working with verification methodologies such as UVM. Previous experience working on microprocessor designs. Experience … and/or C/C++ Keywords: Verification/Semiconductor/Semi conductor/Semi-conductor/CPU/GPU/System Verilog/SystemVerilog/Specman/UVM/Universal Verification Methodology/Microprocessor/Micro processor/C/C++ If you are interested in this Verification Engineer more »
Verification Engineer in Cambridge, UK About Neubla As pioneers of innovative neural computing, Neubla is transforming the future of computing by bringing the enormous potential of neural computing to the highest performance in most data-intensive applications. Neubla is made more »
Principal Digital ASIC Design Engineer – Swindon I am looking for an experienced Digital Design engineer to come and join a large and stable Semiconductor company that is the leader within their field. In this role, you will join their automotive more »
Digital Design Engineer - I am looking for experienced Digital Design Engineers to join a growing power management team - Edinburgh This client is a leading innovator in low-power semiconductor products, and they are currently looking for a Digital Design Engineer more »
s degree in Electrical/Electronic Engineering or related field. 2 - 10 years of experience in RTL design and verification for FPGAs using Verilog, SystemVerilog, or VHDL. Experience with Vivado/Quartus A Software Engineering and Hardware Engineering background is a plus Desirable Skills: Knowledge of networking protocols, such as more »
CPU Design Engineer (m/f/d) - CPU/RTL/SystemVerilog/VHDL Design engineers in the CPU Group are responsible for driving the exciting work of innovation and development of the next-generation of microprocessors. They are required to have in-depth understanding across all the elements … support Understanding of the fundamentals of computer architecture Nice To Have' Skills and Experience: Practical experience of working on microprocessor designs Working knowledge of SystemVerilog Assertions (SVA) Knowledge of scripting eg Python, Perl or unix shell scripting Knowledge of assembly language (preferably ARM), C/C++ and/or hardware … verification languages e.g. SystemVerilog Technical reviewing of others’ work Keywords: CPU/RTL/SystemVerilog/VHDL If you are interested in this Physical Design Implementation Engineer role- please apply below or send a copy of your CV to lh@eu-recruit.com By applying to this role you understand that more »
gadgets on the market today and in the future. The ideal candidate will have: Proven experience of digital ASIC verification techniques Strong experience in SystemVerilog or Verilog testbench creation Experience with OVM, VMM, UVM methodologies Effective problem solving, communication and team working skills (essential!) This position offers the opportunity to more »
Contract Firmware Engineer London/Remote 6-month Contract £65 - £70 per hour (Outside IR35) Are you ready for a new contract with a global aerospace business? IO Associates are seeking a new Firmware Engineer to work alongside the expertise more »
tools. eg. Cadence, Jasper Gold, Siemens EDA QuestaFormal, or Synopsys. Keywords: Formal Verification/Semiconductor/Semi conductor/Semi-conductor/GPU/SystemVerilog/System Verilog Assertions/Property Specification Language/Cadence/JasperGold/Siemens EDA/Synopsys If you are interested in this Formal Verification more »
requirements into micro-architecture • VHDL, Verilog HDL coding • Digital simulation using Modelsim/Questa or similar • Experience with designer-level test bench (VHDL or SystemVerilog) • Familiarity with revision control (git, cvs, clearcase, etc.) • Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) • Experience and willingness for lab testing … EDA tools and flows (Synopsys, Cadence, etc.) • Experience in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG more »
requirements into micro-architecture • VHDL, Verilog HDL coding • Digital simulation using Modelsim/Questa or similar • Experience with designer-level test bench (VHDL or SystemVerilog) • Familiarity with revision control (git, cvs, clearcase, etc.) • Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) • Experience and willingness for lab testing … EDA tools and flows (Synopsys, Cadence, etc.) • Experience in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG more »
requirements into micro-architecture • VHDL, Verilog HDL coding • Digital simulation using Modelsim/Questa or similar • Experience with designer-level test bench (VHDL or SystemVerilog) • Familiarity with revision control (git, cvs, clearcase, etc.) • Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) • Experience and willingness for lab testing … EDA tools and flows (Synopsys, Cadence, etc.) • Experience in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG more »
requirements into micro-architecture • VHDL, Verilog HDL coding • Digital simulation using Modelsim/Questa or similar • Experience with designer-level test bench (VHDL or SystemVerilog) • Familiarity with revision control (git, cvs, clearcase, etc.) • Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) • Experience and willingness for lab testing … EDA tools and flows (Synopsys, Cadence, etc.) • Experience in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG more »
requirements into micro-architecture • VHDL, Verilog HDL coding • Digital simulation using Modelsim/Questa or similar • Experience with designer-level test bench (VHDL or SystemVerilog) • Familiarity with revision control (git, cvs, clearcase, etc.) • Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) • Experience and willingness for lab testing … EDA tools and flows (Synopsys, Cadence, etc.) • Experience in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG more »
requirements into micro-architecture • VHDL, Verilog HDL coding • Digital simulation using Modelsim/Questa or similar • Experience with designer-level test bench (VHDL or SystemVerilog) • Familiarity with revision control (git, cvs, clearcase, etc.) • Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) • Experience and willingness for lab testing … EDA tools and flows (Synopsys, Cadence, etc.) • Experience in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG more »
requirements into micro-architecture • VHDL, Verilog HDL coding • Digital simulation using Modelsim/Questa or similar • Experience with designer-level test bench (VHDL or SystemVerilog) • Familiarity with revision control (git, cvs, clearcase, etc.) • Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) • Experience and willingness for lab testing … EDA tools and flows (Synopsys, Cadence, etc.) • Experience in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG more »
requirements into micro-architecture • VHDL, Verilog HDL coding • Digital simulation using Modelsim/Questa or similar • Experience with designer-level test bench (VHDL or SystemVerilog) • Familiarity with revision control (git, cvs, clearcase, etc.) • Working knowledge of internal logic analyzer (ILA/chipscope/signaltap) • Experience and willingness for lab testing … EDA tools and flows (Synopsys, Cadence, etc.) • Experience in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG more »
Sicily, looking to find two outstanding silicon chip design engineers from an analog background. The work will be to model various analog components in SystemVerilog, and run DMS simulations. Experts with SystemVerilog and DMS experience (at least 5 years in both) are required for this. The role is 100% onsite more »
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
We Are Orbis Group Ltd
Verification Engineer - System Verilog/UVM - Video IP One of Orbis's clients based in Cambridge is looking for multiple Verification Engineers with experience working on Video IP & System Verilog/UVM. Ideally, you would be required to be in more »
Principal Digital ASIC Design Engineer - Swindon I am looking for an experienced Digital Design engineer to come and join a large and stable Semiconductor company that is the leader within their field. In this role, you will join their automotive more »
