1 to 25 of 63 Verification Engineer Jobs in the UK

Software Verification and Validation Engineer | Oxford, £50k-£55k - Hybrid and Flexible Working! Would you like to work with a cutting-edge space robotics company in Oxfordshire? I am currently on the lookout for a Software Verification and Validation Engineer to join the team to perform flight … software verification, validation and integration for satellite onboard computers. You would be part of a team responsible for the verification and validation of embedded real-time software for orbital debris missions and the recovery of retired satellites. Essential skills for the Software Verification and Validation Engineer Commercial experience in software development for real-time embedded systems Experience in Verification and Validation of real-time systems Ideally some safety-critical software experience What's next? If you’re a Software Verification and Validation Engineer looking for a new challenge and would like the more »

The Redline Group are working on a new opportunity for a Contract Verification Engineer, to work with a market leading client in the instrumentation industry, based in Berkshire. This role has an indicative OUTSIDE IR35 determination therefore we can accept candidates who would like to operate through their more »

Are you currently looking for a new career opportunity as a Validation Engineer? If so, Expleo have the perfect opportunity for you! If your skills, experience, and qualifications match those in this job overview, do not delay your application. Expleo is a trusted partner for end-to-end, integrated more »

Are you currently looking for a new career opportunity as a Validation Engineer? If so, Expleo have the perfect opportunity for you! Expleo is a trusted partner for end-to-end, integrated engineering, quality services and management consulting for digital transformation. We help businesses harness unrelenting technological change to … help them gain a competitive advantage and improve the everyday lives of people around the globe. An exciting opportunity has arisen for a Validation Engineer and Validation Co-Ordinator, to join our client on a permanent basis in Staffordshire. You will be responsible for the validation and verification of new electrical and electronic systems to ensure delivery in line with product excellence. Responsibilities of the Validation Engineer and Validation Co-Ordinator include: * Develop prototype solutions to validate proof of concept ideas. * Co-Ordinate machine parts, software and setup, ensuring the latest design solutions are being robustly more »

Formal Verification Engineer We are recruiting Formal Verification Engineers of all seniorities to work for a world-leading Semiconductor Company to join their dedicated Formal verification team working to deliver blocks for next-generation GPUs. This is a permanent working opportunity based in Cambridge, UK. Our … to work with some of the leading engineers in the industry and provides strong opportunities for future career progression. Key responsibilities for this Formal Verification Engineer position: Take an active role in shaping and developing how formal verification is deployed across our client's teams and projects … globally. Promote, develop, and support advanced formal verification techniques. Build formal verification environments for critical areas of GPU design. Mentor junior engineers in formal verification. Develop new formal methodologies. Key Requirements: Strong experience in architecting/implementing formal verification environments. Experience in SVA and PSL. Experience working more »

power or long-distance underwater transmissions, direct current is the only realistic energy transmission alternative. In this role as a control & protection software design engineer at Hitachi Energy, you will be a part of a department which is responsible for automation systems and digital real-time control of the … is a hybrid role based in Glasgow, Scotland. Responsibilities You will be part of all phases of delivery, which includes design, maintenance, testing, integration, verification, and deployment of the HVDC control & protection application functions needed for safe and reliable operations of plants and transmission links. Simulation studies The position more »

Superb opportunity for an ASIC Verification Engineer - UK REMOTE Candidates living in the USA and Germany can also be considered. My client, a market-leading verification consultancy, is looking for an ambitious ASIC Verification Engineer to join their expert team in the UK. This position … the chance to participate in an exciting range of high-profile SoC projects, covering many different industry sectors, working with the most powerful ASIC Verification tools and technologies in the market today. You will have the opportunity to make a real difference to the designs that are used in … many of the most desirable gadgets on the market today and in the future. The ideal candidate will have: Proven experience of digital ASIC verification techniques Strong experience in SystemVerilog or Verilog testbench creation Experience with OVM, VMM, UVM methodologies Effective problem solving, communication and team working skills (essential more »

We are looking for an experienced Verification Engineer to join Arm’s Hardware Platform team on a contract basis. The team is based in Cambridge, UK, and we are working at the forefront of embedded design centering on Arm IP products. We build physical hardware development platforms, based … The platforms are used for software development and validation activities for both our external partners/customers and our internal development teams. Responsibilities: System Verification: Develop and maintain SoC verification testbench in SystemVerilog. Experience with coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups. Programming and … debugging C test cases to verify IP integration into the system, including reusing and translating it from RTL subsystem verification environment for FPGA verification. Familiarity in working on UNIX/LINUX environment and being able to use command line based applications and experience in working with scripting languages like more »

Verification Engineer (m/f/d) Location: Cambridge Our client verification engineers continuously push the boundaries of what is possible with simulation, formal, and emulation tools to produce industry-leading CPU IP. If working at the cutting edge of technology in a world-class team sounds … like an exciting challenge then a role as a Verification Engineer is for you. Responsibilities: For this role, we are looking for experienced Verification Engineers who can contribute to all phases of the verification flow. This includes: Ownership of a specific area of a CPU project … ranging from unit-level testbench development through to the overall verification methodology for a CPU project. Responsibility for producing test plans and verification strategies. Planning, tracking, and coordinating the tasks of you or your team to meet high quality goals at the planned time Ensuring the quality of more »

Verification Engineer | CPU | RTL/UVM/SystemVerilog Location: Cambridge, UK We are recruiting Verification Engineers of all seniorities to work for a world-leading Semiconductor Company on topics including the development of next-generation industry-leading CPU and GPU processors. The company is able to support … opportunity to work with some of the leading engineers in the industry and provides strong opportunities for future career progression. Key responsibilities for this Verification Engineer position: Actively contribute to all phases of the verification flow. Take ownership in specific project areas from testbench development through to … overall verification methodology. Produce test plans and verification strategies. Take part in verification improvement strategies across the CPU group and wider verification community. Key Requirements: A minimum of 3 years of experience working in verification environments for complex RTL designs. Knowledgeable in the use of more »

Verification Engineer - Semiconductor/UVM/SystemVerilog We are recruiting Verification Engineers of all seniorities to work for a global leader in the semiconductor industry specializing in the development of cutting-edge next-generation CPU and GPU processors. This is a permanent working opportunity based in Cambridge … UK. Key responsibilities for this Verification Engineer position: Actively contribute to all phases of the verification flow. Take ownership in specific project areas from testbench development through to overall verification methodology. Produce test plans and verification strategies. Plan, track, and coordinate both individual and team … tasks and ensure the quality of verification work being done. Take part in verification improvement strategies across the CPU group and wider verification community. Key Requirements: A minimum of 3 years’ experience working in verification environments for complex RTL designs. Knowledgeable in the use of hardware more »

Verification Engineer in Cambridge, UK About Neubla As pioneers of innovative neural computing, Neubla is transforming the future of computing by bringing the enormous potential of neural computing to the highest performance in most data-intensive applications. Neubla is made up of people with expertise and lots of … with benefits, including health insurance, a pension scheme, employee wellness support, and a variety of snacks in the office! Summary Want to use your verification expertise to make the future of computing possible? We're looking for an exceptional individual who can drive the pre-silicon verification of … Job Description Work closely with designers and architects to develop and ensure high quality test plans, functional coverage, and scenarios iUse simulation and formal verification methodologies to execute the test plans and scenarios. Write checkers, assertions and develop stimulus Work closely with system architects, software teams to validate various more »

Role: Electrical Systems Test and Validation Engineer Location: Millbrook Position type: Contract (6 months) IR35 Determination: Outside Our Client currently has an exciting opportunity for an Electrical Systems Test and Validation Engineer to join our Design, Development and Engineering Centre based in Millbrook Responsibilities: * Test and validation of … management of technical deliverables such as Feature Implementation Plans, software timing plans, issues trackers, signals databases and open issues decks. * Participation in system review, verification & validation activities including FMEAs, * DVP planning, ISO26262 functional safety and other tests throughout the development lifecycle. * Provision of support and training to Manufacturing and more »

Design Verification Engineer - UVM/IP/GPU/CPU Location: Cambridge, UK We are working with the world's leading CPU and GPU development company who are looking to add to their team working on the latest graphics technologies at their HQ in Cambridge. The role will … see you work with a team on the design verification of IP used within the company's GPU and CPUs. This is a permanent role, on-site with the team and visas can be provided for candidate's located outside of the UK. Responsibilities Work on the design verification of the company's CPU and GPU technologies Produce test plans and verification strategies Test bench development in UVM Being part of verification improvement strategies across the CPU and GPU group and the wider verification community Requirements for this Embedded Software Role: Experience working hands-on more »

IC Resources is currently working with a UK client who are looking for ASIC Verification Engineers to join there team. They are developing rescuable IP for the wider company and have set up a new division to develop, maintain and distribute this. Remote working will be accepted but only more »

space, sustainability is at the heart of our purpose. So what's your next change? An exciting opportunity has arisen for a Senior Test Engineer (Verification and Validation) within Cyber Security Division in Airbus Defence & Space. This role has been created due to an expansion of the business … be employed in a multi-disciplined project team, working closely with Software and Hardware teams in an open office environment. The Senior Cyber Test Engineer (Verification and Validation) is an acknowledged company expert in at least one aspect of testing, and is required to apply this expertise across … more than one project at a time. You will form the primary point of contact for project verification and validation for both the internal and external project teams and will include significant amounts of customer contact. Here at our lively site in Newport, you can expect a high focus more »

Table Tennis and more! Full range of company benefits, flexible working, training, development and clear career progression! Responsibilities: Responsible for the full life cycle verification and validation activities required to formally evidence complex solutions as part of a system engineering approach. Create and maintain Systems V&V artefacts such more »

Integration Laboratory (SIL) and on customer site. Produce and maintain IVV&T strategy and produce associated documentation such as System Integration Plan (SINTP), System Verification & Validation Plan Acceptance Test Plans and procedures and test reports. Lead Test reviews (TRRs, TRBs) Ensuring suppliers contribution to verification and validation is more »

FPGA/Embedded System Engineer We think you'll love this opportunity, even if we are slightly biased! As an experienced Design & Verification Engineer Engineer, you will be part of the hardware platform team that builds development platforms for leading CPU and System IP products, that … ability to apply your RTL design skills using SystemVerilog for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc. … Tcl, Make, bash etc will also be required.. Required Skills and Experience: Proven experience of delivering RTL designs in a SoC or FPGA. RTL Verification at both unit and system level, using SV including SVA. Experience of ASIC or FPGA synthesis tools. Unix/Linux skills including shell programming more »

ASIC Verification Engineer - Bristol Hybrid working model and a fantastic compensation package. As a Digital Verification Senior Staff Engineer, you will work within the IP Development team in Bristol, a team with a proven track record in successful IP deliveries into Automotive Microcontrollers. This is an … Verilog – UVM testbenches and solve potentially complex problems related to test bench development Be responsible for developing right from scratch UVC components for new verification environments; Be responsible for defining and writing a functional coverage model; Debug failing test cases to root cause; Participate in reviews to ensure test … bench meets quality and is complete; Contribute to verification perspective in Design and Concept meetings; Ensure test bench meets sign-off targets, including coverage, functional safety and test bench qualification; Proactively help increase efficiency of verification activities and mitigate risks early; Contribute to enhancing Verification strategy and more »

Freelance Design & Verification (FPGA) Engineer – Cambridge (England) –12 Months+ We're looking for an expert Design & Verification Engineer to join the Platform team on a contract basis. We work at the forefront of embedded IP and system design. We build physical hardware development platforms, to FPGA … accurate modelling of incoming designs, we must constantly develop new and innovative prototyping techniques. Responsibilities: of FPGA architecture specifications into RTL designs with accompanying verification environments to ensure the specifications are followed. Your designs will then be incorporated into SoC and reference designs before being thoroughly tested as system … System-)Verilog for either/or FPGA and ASIC, as well as a good understanding of FPGA device architecture is essential. role also requires verification experience using System-Verilog and possibly UVM environments including coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups. will work with a more »

A Digital Verification Engineer who can bring 5+ years Semiconductor Industry experience and a strong academic background will be highly rewarded by a thriving high-tech scale up. The Company: This exciting Technology company is making a mark in the semiconductor industry, a leader in the development of more »

Digital Design Verification - RISC-V ISA - Processor Microarchitecture - CPU - Formal Verification - Model checking - Property checking - SVA - OneSpin - JasperGold- International teams - Start-up culture Locations: France (Villeneuve-Loubet), Germany (Munich), the UK (Bristol/Cambridge), the Czech Republic (Brno, Prague), Barcelona (Spain), Greece (Heraklion/Thessaloniki/Athens) Department … Verification Employment Type: Full-Time Experience: Mid-Senior Level Daily collaboration with: Laurent Arditi (Formal Verification Lead) Codasip is scaling up, so we would like to announce a Formal Verification role with the main goal to raise the usage of formal techniques applied to Codasip processors, including … and High-Performance RISC-V application processors, including multiple-issue and/or multi-core architectures as well as the high-end ones. Our Verification and IP Design Engineers are located in our Design Centers in Brno/Prague (Czech Republic), Villeneuve-Loubet (France), Munich (Germany), Bristol/Cambridge more »

CPU Verification Engineer - RISC-V - AI I am partnered with an incredibly exciting start up who work on AI Accelerators and RISC V technologies, who are looking to bring on a Senior Verification Engineer onto their team in Cambridge on a hybrid basis (2 days per … BSc and are looking to expand their site in Cambridge, which currently has around 20 people. Your profile: 5+ years of experience on IP Verification Good understanding of CPU micro-architecture (RISC V or Arm) Proficiency in computer/SoC architecture and performance trade-offs By applying to this more »

Summary/Role Purpose The R&D Verification Engineer II is responsible for the automated testing activities of Motor-CAD, a Multiphysics simulation tool utilizing complex FEA and analytical methods. In this role, the R&D Verification Engineer II use advanced engineering and software skills to … impact in electric motor design and sustainable clean energy products. Key Duties and Responsibilities Perform automated testing activities, including the implementation, maintenance, monitoring and verification of automated build and test processes Create test plans and contribute to testing initiatives, participate in defect management Collaborate with others to analyse product more »