Design VerificationEngineer - Berkshire This is an opportunity for a Design VerificationEngineer to join an innovative environment and an organisation making changes in the technology sector. The Design VerificationEngineer will join a team developing high-performance, low-power signal processing solutions in … for new generations of mobile and consumer devices. You will join the team in Berkshire and will take ownership of all aspects of digital verification for complete IC developments, work on complex verification subsystems and will contribute towards improvements in methodology. Responsibilities Definition of IC verification plan … linking product requirements through to detailed testcases Leading teams of verification engineers to deliver thoroughly verified ICs Create reliable and reusable testbench for complex subsystems and ICs Participate in verification Specialist Groups and contribute to the digital verification methodology discussions Hands-on project design/verificationmore »
Based in Vancouver, Canada, this is an opportunity for an experienced VerificationEngineer to join one of the world’s leading RISC-V companies. The VerificationEngineer will become part of a worldwide CPU team developing next-generation RISC-V products for applications including 5G, AI … and machine learning. The VerificationEngineer will study CPU architecture and microarchitecture implementations and determine the best methods to verify them. This is a senior role in which the VerificationEngineer will be responsible for hands-on verification regression management and debugging, functional verification, code coverage, Formal proofs, and verification reports, and will guide more junior members of the Verification team. The right candidate for this role will be an experienced IC VerificationEngineer with the following: A BSc/MSc degree in Computer Engineering or similar Proven experience more »
We are seeking a CPU VerificationEngineer to join one of the world’s leading RISC-V companies. This role can be based in Portland Oregon, or remotely. Our client was ranked among the top IP companies in the world. They are expanding exponentially, building their Verification teams in several international locations, and seek a CPU VerificationEngineer to develop the next-generation RISC-V products for applications including 5G, AI and machine learning. The successful CPU VerificationEngineer will have: A BSc/MSc degree in Computer Engineering or similar Proven … experience in Hardware Verification, with expertise within SystemVerilog/UVM A keen interest to work on RISC-V projects Previous experience working on CPU/GPU Verification is ideal A great work ethic, eagerness to learn Eligibility to work in the US (visas cannot be sponsored at the more »
We are seeking a Senior VerificationEngineer to join a market-leading Semiconductor IP company developing on-chip network technology. This role can be based in California or Austin, TX. Our client, still relatively young, is experiencing huge demand for their technology. They have achieved massive revenue growth … year-over-year, and are now hiring for a Senior VerificationEngineer with cache coherency experience to own verification activities on high performance, low power designs for a major new project. The role will involve working on some of the world's most sophisticated SoC designs within … areas such as autonomous driving and machine learning. The Senior VerificationEngineer will be responsible for advanced UVM based testbench development and owning RTL verification test/coverage at system level. The Design VerificationEngineer will be a UVM expert, capable of refining the verificationmore »
Cheltenham, Gloucestershire, South West, United Kingdom
Jefferson Wells
FPGA VerificationEngineer Location: Cheltenham Duration: 6 months contract Rate Up to £75ph - Umbrella (Inside IR35) Role Summary: My client is looking for and experienced VerificationEngineer with a strong background in FPGA design. The ideal candidate would be owning and carrying out various aspects of … verification activities as requested by the technical leads. You will be working within the aviation industry for a 6 months minimum contract. Essential Responsibilities: FPGA/VHDL verification activities as per DO-254 PRs and documentation Code reviews along with elemental analysis. Owning and carrying out various aspects … of verification activities as requested by the technical leads. Assessing code coverage. Desired characteristics: Very strong VHDL knowledge, particularly for verification (including score boarding) Strong background in FPGA design Knowledge of scripting languages, e.g. Python Clear communication skills Model sim - required Keen attention to detail balanced with a more »
the right talents to solve real-world mobility challenges and invent the transport systems of tomorrow. An exciting opportunity has arisen for a Validation & VerificationEngineer based in Derby. The V&V Engineer will report directly to the V&V Lead Engineering Manager. Role: The successful candidate … Key Responsibilities include but are not limited to: Create and maintain projects in the approved V&V management tools Support the production of the verification and validation reports, including the production of template reports Provide project requirement's management progress/KPI reports Support the Competence Manager with the more »
Cheltenham, Gloucestershire, South West, United Kingdom
Jefferson Wells
Role: Systems VerificationEngineer Contract: 12 Months Site Location : Cheltenham Rate : £80ph Umbrella I nside IR35 Essential Responsibilities * Support work required to deliver Systems development and/or verification activities against customer requirements as directed by the team lead. * Experience of the Systems lifecycle. * Contributing to the … new/updated design of a system architecture. * Support the creation & execution of Systems verification artefacts to ensure requirements are correctly met. * Awareness & ideally experience of some of the following; requirements, design, architecture, verification (manual & automated scripts), traceability, baseline & change control. Qualifications/Requirements * Experience of the system more »
San Jose, Santa Clara County, California Hybrid / WFH Options
IC Resources
Join one of the world's foremost RISC-V companies as a Design VerificationEngineer, contributing to the development of cutting-edge CPU products for applications such as 5G, AI, and machine learning. As a top company they offer competitive compensation, benefits, and full remote working options (they … like to visit the office). There is huge room for professional growth while they are expanding, through skill sets and promotions. The Design VerificationEngineer will become part of a worldwide CPU team, you will analyse CPU architecture and microarchitecture implementations to devise optimal verification strategies. … Responsibilities: Lead hands-on verification regression management, debugging, and functional verification. Implement code coverage and Formal proofs. Generate comprehensive verification reports. Mentor and guide junior members of the Verification team. Requirement: A BSc/MSc degree in Computer Engineering or similar Proven experience in Hardware Verificationmore »
An excellent opportunity for a Principal VerificationEngineer with a world-leading Semiconductor company based in Ireland. Visa sponsorship and relocation assistance provided where needed. Based in Dublin, a major electronics hub in Ireland, our client is looking for a Principal VerificationEngineer to drive block … verification for next-generation Video/GFX products. The Principal VerificationEngineer will lead the verification activity by determining the verification plan, test bench development, test content development and enhancing verification components for a coverage driven verification flow. To be successful in this … role, the Principal VerificationEngineer will need: A BSc/MSc degree in Microelectronics or similar Extensive experience in digital ASIC verification and logic verification techniques Expert level experience in SystemVerilog UVM, formal verification and coverage closure Experience leading a verification feature would be more »
Are you excited about R&D? An R&D Centre in Munich is looking for an experienced AMS VerificationEngineer to work full time in their office (no hybrid working!). International candidates with strong skills in System C, System Verilog, Verilog A will be considered and visa …/IP according to both application and circuit design requirements Implementation of user cases, fault injection and simulation test bench for analog system design verification Maintenance and quality assurance for analog system models’ accuracy, scalability and reusability Work with CAD group to improve the mixed signal verification methodology more »
Senior VerificationEngineer - Lower Saxony - leading optical communications company A global leader in opto-electronic applications for industrial, optical communications, aerospace and defence, life sciences, semiconductor and consumer market and offices in multiple countries is looking for a Senior VerificationEngineer for one of their design … centres in Northern Germany. The Senior VerificationEngineer will contribute to the development of high-speed System-on-Chip devices in latest CMOS technology for industry-leading optical products including transceivers, transponders and ROADM products. The successful Senior VerificationEngineer has the following skills and qualifications … Master’s degree (Dipl.-Ing.) or PhD in electrical engineering or computer science Minimum 5 years of experience in ASIC development Expertise in verification methodologies & tools Strong knowledge of UVM Excellent programming skills in hardware description languages (e.g. SystemVerilog) Good programming skills in scripting languages (e.g. Python, Perl, Tcl more »
Lead ASIC VerificationEngineer - Netanya, Israel - Leading Global Semis Company! This is an exciting opportunity for an experienced ASIC VerificationEngineer to join a leading international semis company as a Team Lead. As a Technical Lead you would be responsible for a team if … Verification Engineers, guiding and mentoring them technically whilst remaining involved in complex verification activities. Despite being a global giant within the semis industry, my client's team in Israel operate a fast-paced and innovative working environment. Key Skills Include: Experience in full chip and block level logic … verification. Experience developing complex UVM verification environments. Technical leadership experience. Experience developing test benches from scratch. Knowledge of SystemVerilog and Verilog. Experience mentoring junior Engineers. If you are interested in finding out more, or applying for this position, please contact Lucy Edmondson more »
ASIC VerificationEngineer - Bristol Hybrid working model and a fantastic compensation package. As a Digital Verification Senior Staff Engineer, you will work within the IP Development team in Bristol, a team with a proven track record in successful IP deliveries into Automotive Microcontrollers. This is an … Verilog - UVM testbenches and solve potentially complex problems related to test bench development Be responsible for developing right from scratch UVC components for new verification environments; Be responsible for defining and writing a functional coverage model; Debug failing test cases to root cause; Participate in reviews to ensure test … bench meets quality and is complete; Contribute to verification perspective in Design and Concept meetings; Ensure test bench meets sign-off targets, including coverage, functional safety and test bench qualification; Proactively help increase efficiency of verification activities and mitigate risks early; Contribute to enhancing Verification strategy and more »
ASIC VerificationEngineer - Dublin Hybrid working model and a fantastic compensation package. As a Digital Verification Senior Staff Engineer, you will work within the IP Development team in Dublin, a team with a proven track record in successful IP deliveries into Automotive Microcontrollers. This is an … Verilog - UVM testbenches and solve potentially complex problems related to test bench development Be responsible for developing right from scratch UVC components for new verification environments; Be responsible for defining and writing a functional coverage model; Debug failing test cases to root cause; Participate in reviews to ensure test … bench meets quality and is complete; Contribute to verification perspective in Design and Concept meetings; Ensure test bench meets sign-off targets, including coverage, functional safety and test bench qualification; Proactively help increase efficiency of verification activities and mitigate risks early; Contribute to enhancing Verification strategy and more »
CPU VerificationEngineer - Bristol Hybrid working model and a fantastic compensation package. As a Senior Staff CPU VerificationEngineer, you will work hands-on and contribute across the Verification team possibly in a lead role or key contributor in one of the key functions needed … for CPU/IP Verification. You will take the ownership and drive verification methodologies for high quality deliveries. This is an exciting time to join an established Semiconductor in the vibrant city of Bristol. Bristol is a city straddling the River Avon in the Southwest of England with a … s degree in Electrical/Electronic Engineering or equivalent degree; Full and deep understanding of the CPU architectures is an advantage; Expertise in hardware verification languages such as SV UVM, UVM and SVAs, and SystemVerilog; Knowledge of verification platform and framework development, RTL and Gate level (optional) functional more »
SoC VerificationEngineer - Bristol Hybrid working model and a fantastic compensation package. This is an exciting time to join an established Semiconductor in their new Chip Group in the vibrant city of Bristol. Bristol is a city straddling the River Avon in the Southwest of England with a … local social and industrial heritage. The harbour's 19th-century warehouses now contain restaurants, shops and cultural institutions. You will join as a SoC VerificationEngineer, you will have the unique opportunity to work closely with cross-functional teams to execute SoC verification tasks, develop innovative test … party VIP components. Key requirements Master’s or bachelor’s degree in Electrical/Electronic Engineering; At least 3 years of experience in a Verification role, either at IP or SoC level; Knowledge of tools like Xcelium, Spectre(X) and Simvision; Strong foundational knowledge of digital/mixed-signal more »
I am looking for Design Verification Engineers off all levels as I have a fantastic new opportunity in Cork. This is a superb opportunity to join my client, a world leading wireless semiconductor company. This role would best suit a Junior Engineer wanting to take the next step … in their career and expand on their knowledge or a Senior Engineer who can share their knowledge with the rest of the team. You will be using the latest tools and techniques in Digital Design and Verification working on cutting- edge designs down to advanced nm’s. Preferred … qualifications: Experience in design, testing and verification on SoCs and SoCs Methodologies Proficient in developing unit SoC level test benching using UVM/OVM/VMM Experience in System Verilog Experience in Gate Level Stimulation (GLS) Verification glow for SoC Verification Experience of pre-and post-silicon more »
Senior VerificationEngineer - Leading Semiconductor Company - Edinburgh or Newbury One of the world’s leading mixed-signal Semiconductor companies is looking for a Formal VerificationEngineer to join their team. This role can either be based in Edinburgh or Newbury. This is an exciting opportunity to … join an established international semiconductor company with over 40 years’ experience, as they look to expand their Verification team. Bachelors or Masters in Electronic Engineering or a related field Experience with UVM/OVM Experience with System Verilog and System Verilog Assertions Strong Debugging skills For more information on more »
My client, a market-leading verification consultancy, is looking for a Design VerificationEngineer to join their expert team in the US (remote). This Design VerificationEngineer position offers the chance to participate in an exciting range of high-profile projects, covering many different … industry sectors, working with the most powerful Verification tools and technologies in the market today. You will have the opportunity to make a real difference to the designs that are used in many of the most desirable gadgets on the market today and in the future. Requirements: A BSc …/MSc degree in Computer Engineering or similar Proven project experience of verification Strong experience in SystemVerilog or Verilog testbench creation Experience with OVM, VMM, UVM methodologies Effective problem solving, communication and team working skills (essential!)This position offers the opportunity to develop new skills and learn from other more »
San Jose, Santa Clara County, California Hybrid / WFH Options
IC Resources
Join one of the world's foremost RISC-V companies as a Senior VerificationEngineer, contributing to the development of cutting-edge CPU products for applications such as 5G, AI, and machine learning. As a top company they offer competitive compensation, benefits, and full remote working options (they … like to visit the office). There is huge room for professional growth while they are expanding, through skill sets and promotions. The Senior VerificationEngineer will become part of a worldwide CPU team, you will analyse CPU architecture and micro-architecture implementations to devise optimal verification strategies. Responsibilities: Lead hands-on verification regression management, debugging, and functional verification. Implement code coverage and Formal proofs. Generate comprehensive verification reports. Mentor and guide junior members of the Verification team. Requirement: A BSc/MSc degree in Computer Engineering or similar Proven experience in Hardware more »
Royston, Hertfordshire, South East, United Kingdom
Vector Recruitment Ltd
Senior Verification & Validation Engineer Cambridgeshire £40k - £55k (dep on exp) + bonus and excellent benefits! A fantastic opportunity for a Senior Verification & Validation Engineer has arisen at a Cambridge based cutting edge leading medical device development company whose innovative technology is reshaping the medical, life science … and diagnostics sectors! You will be leading the verification and validation activities for this groundbreaking and market disruptive point-of-care diagnostics device! As the Senior Verification & Validation Engineer, you will use your previous experience in product development within a regulated environment to draft V&V protocols … release of this product, you will need to adhere to the requirements of medical device regulations – ISO 13485/FDA environments. As the Senior Verification & Validation Engineer, your responsibilities will include: Lead the planning of verification activities for the system, including both the Instrument and test consumable. more »
Software Verification and Validation Engineer | Oxford, £50k-£55k - Hybrid and Flexible Working! Would you like to work with a cutting-edge space robotics company in Oxfordshire? I am currently on the lookout for a Software Verification and Validation Engineer to join the team to perform flight … software verification, validation and integration for satellite onboard computers. You would be part of a team responsible for the verification and validation of embedded real-time software for orbital debris missions and the recovery of retired satellites. Essential skills for the Software Verification and Validation Engineer Commercial experience in software development for real-time embedded systems Experience in Verification and Validation of real-time systems Ideally some safety-critical software experience What's next? If you’re a Software Verification and Validation Engineer looking for a new challenge and would like the more »
Exciting opportunity to work on the latest cutting edge RISC-V technology in the semiconductor industry. In this new role as digital verificationengineer you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, ARM & CPU architecture, PCIe protocols and machine learning. … I am looking to speak with digital verification engineers with 5+ years of experience - who have the following skills: Required: Masters or PHD degree in Electronics/Microelectronics or similar field 5+ years' experience in UVM environments & process ASIC/FPGA development System Verilog for IP/SOC Verification of digital ICs/ASIC IP or chips complex ASIC designs & architecture for advanced technology nodes Verification Metrics definition, Coverage analysis and debugging skills. Knowledge and experience on setting up an ASIC Verification environment, methodology and flow. vManager, vPlan and Regressions, etc. Digital Test Plan definition/ more »
BRAND NEW ROLE, BRAND NEW TEAM, BRAND NEW COMPANY COMING TO PORTUGAL FOR THE FIRST TIME!!!*** Exciting opportunity for a Senior Digital IC VerificationEngineer, to work in the beautiful setting of Portugal - in either Porto or Lisbon. Our client is one of the world’s fastest-growing … billion dollar turnover company with enormous growth and development plans - so business is thriving for them! They are now seeking multiple Senior Digital IC Verification Engineers to help build a brand new team in their new design centre. Role: UVM and System Verilog Verification. Verification Metrics definition, Coverage … analysis and debugging skills. Knowledge and experience on setting up an ASIC Verification environment, methodology and flow. vManager, vPlan and Regressions, etc. Digital Test Plan definition/creating/set-up test benches Knowledge of analog/mixed-signal (AMS) environments is a bonus Knowledge of SOC verificationmore »
Working for a leader in power in power electronics, this is a great opportunity to join a growing team, as UVM verification engineer. Job duties: Developing test plans, tests and verification infrastructure using SV/UVM methodology Building reusable bus functional models, monitors, checkers and scoreboards Performing coverage … driven verification closure Performing block level, multi-block level and system-level verification Performing Gate level simulations Performing Mixed Signal simulations Implementing Regression tests Performing Formal Verification Working closely with IC designers and post-silicon engineers Qualifications and Background Requirements: Knowledge/experience with HDL (SystemVerilog/… VHDL), particularly for testbenches creation Knowledge/experience in scripting languages, such as Tcl and Python Some knowledge of ASIC design flow and related verification step Nice to have: Some experience in digital RTL design Knowledge of UVM environments and classes Some experience with main EDA vendors simulators such more »