IP/cryptography Understanding of SOC and IP level design Understanding of the whole digital design flow - RTL-GDS2 Understanding of UVM and system verilog verification processes embedded hardware, systems, firmware coding/scripting in python, C++, system C, TcL, bash, perl, Rust etc. more »
and designing implementations using VHDL, Simulink, and other tools to target Xilinx, Intel, and Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog/UVM test bench methodologies. FPGA design using Mentor verification tools, including QuestaSim and ModelSim. Developing low-level software (in C) to facilitate FPGA testing more »
areas: Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and more »
areas: Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and more »
Saffron Walden, Essex, South East, United Kingdom Hybrid / WFH Options
Technical Futures
processing techniques. The FPGA Design engineer will take the lead on DSP system design and architecture; will design and verify FPGA code (VHDL or Verilog) using Xilinx design tools as well as designing software for test and verification. Skills Summary for the FPGA Engineer includes: A Technical Degree or equivalent more »
Skills MSc/PhD with 10+ years of industrial experience in leading the design of complex digital IP/SoCs Strong experience in SystemVerilog, Verilog, and/or VHDL Strong experience in designing signal processing, datapaths, interfaces, interconnects Strong knowledge of clock domain crossing (CDC) techniques, asynchronous design techniques Strong more »
and Hyperlynx tools • Embedded software knowledge to test and debug the design with a creative and structured approach to problem-solving. • RTL skills in Verilog or VHDL • Use of a UNIX environment and shell programming/scripting in e.g. Tcl, Perl, Python etc • Programming languages such as: assembly language (ideally more »
System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale+, Intel Stratix-10, and Xilinx RFSoC. • Proficiency in hardware descriptor languages, HDL (VHDL, Verilog) and/or MATLAB model(s). • Ability to perform design constraints generation and verification as well as evaluate synthesis and timing performance reports. • Hands more »
Stevenage, Hertfordshire, South East, United Kingdom
Henderson Scott
for: Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and more »
deliver customer requirements by: Developing high-level firmware requirements using DOORS, Creating architectural designs, Defining low level requirements and detailed designs, Writing VHDL and Verilog HDL code using Sigasi Studio, Simulating HDL designs at unit, integration and system level using Mentor Graphics QuestaSIM, Undertaking synthesis, place and route and static more »
