Swindon, Dudley, West Midlands Hybrid / WFH Options
IC Resources
git, gitlab or github, CI/CD, automated build systems. MISRA/quality-assurance techniques ability read and understand schematics. knowledge of VHDL/Verilog for ASIC/FPGA design.This is a really fabulous role for someone who is looking to take a step up in their career, with opportunity more »
Swindon, England, United Kingdom Hybrid / WFH Options
IC Resources
git, gitlab or github, CI/CD, automated build systems. MISRA/quality-assurance techniques ability read and understand schematics. knowledge of VHDL/Verilog for ASIC/FPGA design. This is a really fabulous role for someone who is looking to take a step up in their career looking more »
tools like Xcelium, Spectre(X) and Simvision; Strong foundational knowledge of digital/mixed-signal design & verification; Knowledge and hands-on experience of System Verilog and UVM;It is an advantage if you also have: Hands-on experience in hardware-software debugging at the system or application level; Hands-on more »
Greater Bristol Area, United Kingdom Hybrid / WFH Options
IC Resources
The harbour's 19th-century warehouses now contain restaurants, shops and cultural institutions. In your new role you will: Be responsible for developing System Verilog – UVM testbenches and solve potentially complex problems related to test bench development Be responsible for developing right from scratch UVC components for new verification environments … risks early; Contribute to enhancing Verification strategy and architecture of IP testbenches. Key Skills At least 8 years of experience in Verification working with Verilog and/or SystemVerilog; 5 years of experience on IP/block level Test-bench bring up on SV UVM based platform; The ability to more »
The harbour's 19th-century warehouses now contain restaurants, shops and cultural institutions. In your new role you will: Be responsible for developing System Verilog - UVM testbenches and solve potentially complex problems related to test bench development Be responsible for developing right from scratch UVC components for new verification environments … mitigate risks early; Contribute to enhancing Verification strategy and architecture of IP testbenches.Key Skills At least 8 years of experience in Verification working with Verilog and/or SystemVerilog; 5 years of experience on IP/block level Test-bench bring up on SV UVM based platform; The ability to more »