4 of 4 Design Engineer Jobs in County Antrim

Description: Role: Senior IP Design Engineer Type: Contract Location: Belfast, UK Hybrid Job details: Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements. Key Skills: SystemVerilog RTL design 100Gb Ethernet, PCIe Gen5, AMBA …/AXI Deep understanding of FPGA/Adaptive SoC design flow including P&R and timing closure Vivado/Vitis expertise Python/Tcl scripting Git & CI/CD experience ...

services through global simplicity with trusted transparency. This role provides deep technical expertise in LMR (Land, Mobile & Radio) security systems, specialising in RF design, system configuration, complex troubleshooting, and optimisation. You will be responsible for the technical integrity and performance of LMR solutions from design to deployment. … System Design & Architecture Validate and update designs and BOM based on data provided following site-walk GRID Mapping surveys. Provide deep technical expertise in LMR systems, including technologies such as analog, digital (e.g., P25, DMR, TETRA), and trunked systems. Develop and maintain standardised DAS system design and processes. ...

Description: Role: Senior IP Design EngineerType: ContractLocation: Belfast, UK Hybrid Job details:Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements. Key Skills:SystemVerilog RTL design100Gb Ethernet, PCIe Gen5, AMBA/AXIDeep understanding of FPGA …/Adaptive SoC design flow including P&R and timing closureVivado/Vitis expertisePython/Tcl scriptingGit & CI/CD experience JBRP1_UKTJ ...

Description:Role: Senior IP Design EngineerType: ContractLocation: Belfast, UK Hybrid Job details: Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements.Key Skills:SystemVerilog RTL design100Gb Ethernet, PCIe Gen5, AMBA/AXIDeep understanding xkybehq of FPGA …/Adaptive SoC design flow including Make sure to read the full description below, and please apply immediately if you are confident you meet all the requirements. Please click on the apply button to read the full job description ...