3 of 3 Design Engineer Jobs in Edinburgh

Digital IC Design Engineer — Next-Generation AI ASICs Cambridge or Edinburgh An innovative fabless semiconductor start-up is developing cutting-edge AI accelerator chips designed to deliver an order-of-magnitude performance improvement while dramatically reducing power consumption. Join a team tackling one of the most significant challenges in computing designing the hardware foundation for the next era … of artificial intelligence. Role Description This is a full-time, on-site position for Digital IC Design Engineers at all experience levels, based in Cambridge or Edinburgh (UK) . The role involves end-to-end digital design and development, from microarchitecture definition to RTL implementation and verification. You will work closely with a highly skilled cross-functional team … to ensure robust, efficient, and timely delivery of advanced AI ASIC designs. Key Responsibilities Design and implement high-performance digital microarchitectures for AI processing cores, memory hierarchies, and interconnects. Collaborate with architecture, verification, and software teams to define features, develop specifications, and make informed design trade-offs between performance, power, and area. Ideal Qualifications Bachelor’s or Master More ❯

Design Verification Engineer Edinburgh I have an exciting opportunity for a talented Verification Engineer to join an Edinburgh or Newbury based HW Team. As a Verification Engineer you will participate in all aspects of digital verification for complete mixed signal IC developments, work on complex verification systems and contribute towards improvements in verification methodology within the … verification specialist groups and contribute to the digital verification methodology discussions Supporting, and where necessary coaching, the verification team to follow, and improve, defined methodology practices Hands-on project design/verification involvement Required Skills and Qualifications BEng/BSc/MEng/MSc Degree or equivalent in Electronics/Computer Science or other related discipline. Metric driven verification … verification planning, requirements extraction – directed and constrained random verification – functional and code coverage analysis SystemVerilog – SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF) This position is based More ❯

Design Verification Engineers — Next-Generation AI ASICs Cambridge or Edinburgh An innovative fabless semiconductor start-up is developing cutting-edge AI accelerator chips designed to deliver an order-of-magnitude performance improvement while dramatically reducing power consumption. I am seeking experienced Verification Engineers to ensure the functional correctness and robustness of complex AI accelerator designs. You will play a … key role in developing advanced verification environments and driving coverage closure to achieve first-silicon success. Key Responsibilities Collaborate with design and architecture teams to define and implement verification strategies for AI accelerator blocks and SoC subsystems. Build scalable SystemVerilog/UVM testbenches, including test plans, monitors, checkers, scoreboards, and constrained-random stimulus. Perform coverage-driven and assertion-based … resolve them. Develop verification frameworks that scale across unit-level simulation, emulation, and post-silicon validation, incorporating high-level models and test generators. Qualifications Proven experience in digital IC design verification, preferably with exposure to CPU, GPU, NPU, or AI accelerator IP. Strong skills in SystemVerilog, UVM, and scripting languages such as Python, C++, Perl, or TCL. Solid understanding More ❯