FPGA Design Engineer
Derby, Derbyshire, East Midlands, United Kingdom
JAM Recruitment Ltd
level requirements and detailed designs, Writing VHDL and Verilog HDL code using Sigasi Studio, Simulating HDL designs at unit, integration and system level using Mentor Graphics QuestaSIM, Undertaking synthesis, place and route and static timing analysis using Synopsis Synplify, targeting Xilinx FPGAs, Developing Python scripts for process automation more ยป
Employment Type: Permanent
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