verification, Object-Oriented and Randomized Verification, as well as Gate Level Simulation. Top-level metric-driven analog mixed-signal (AMS) simulations. Modelling and validation of analog blocks (RNM, Verilog-AMS). Proficiency with Cadence tool suite, such as Xcelium/IMC/Virtuoso etc. Verification planning tools (ePlanner/… silicon verification of impactful, innovative mixed-signal products, working with a team of verification and design engineers. Bridge the verification and validation environments, supporting post-silicon validation. Execute for 100% verification coverage, combining DMS and AMS, top-level, IP-level, and Formal Analysis. Establish and continuously improve verification flows ...
