Senior Hardware Design Engineer (Low Latency)
- Hiring Organisation
- Berkeley Square - Talent Specialists in IT & Engineering
- Location
- City of London, London, United Kingdom
Overview: My client is a global tech firm seeking an FPGA/ASIC Hardware Engineer to design high-performance, low-latency compute systems. You’ll design RTL in SystemVerilog, optimise data pipelines, and work on advanced hardware platforms in a hands-on, performance-focused role—no industry … optimise RTL for complex data structures and processing pipelines Explore and evaluate new tools, technologies, and architectures Contribute to a fast-moving, modern hardware development environment Key requirements: 4+ years’ experience in FPGA or ASIC RTL design Strong SystemVerilog expertise Deep understanding of FPGA/ASIC architectures ...