2 of 2 UVM Jobs in Farnborough

control Experience developing HDL solutions for Microchip devices and using Libero for design synthesis an advantage. Experience verifying HDL solutions using Modelsim/Questasim (UVM experience would be beneficial). UK citizenship What will help you on the job Requirement's analysis, capture and management using DOORs Use of SmartFusion ...

following: Designing complex FPGA architectures using VHDL, Simulink, etc. Targeting Xilinx, Intel, and Microsemi devices Verifying FPGA designs with VHDL & SystemVerilog/UVM Experience with FPGA toolsets and Mentor tools (QuestaSim/ModelSim) Generating low‐level C software for test and integration Confident documenting and configuring designs to a high ...