4 of 4 Validation Engineer Jobs in the South West

Role - SoC Functional Validation Engineer Location - Bristol, UK (Candidates must be open to travel when required . Initially, the role will require onsite presence in Bristol, UK for approximately 1 month) Contract - Inside IR35 About HCLTech HCLTech is a global technology leader delivering services across Digital, Engineering, Cloud … enable enterprises to reimagine their businesses for the digital age through innovation and agility. Role Overview We are seeking a highly skilled SoC Functional Validation Engineer to join our team in Bristol, UK . This role focuses on functional validation and bring-up of next-generation ...

Role - SoC Functional Validation Engineer Location - Bristol, UK (Candidates must be open to travel when required) Contract - Inside IR35 About HCLTech HCLTech is a global technology leader delivering services across Digital, Engineering, Cloud, and AI. We enable enterprises to reimagine their businesses for the digital age through innovation … agility. Role Overview Functional Validation of a new SOC designed with high end ARM processors Functional Bring-up of SOC interfaces like LPDDR, Ethernet, PCIe, HBM, CPU's, Low speed Ios (UART, I2C, I3C, SPI), Coherent Mesh etc. Develop bare metal C tests and debug using FPGA HAPS/ ...

Role - SoC Functional Validation Engineer Location - Bristol, UK (Candidates must be open to travel when required . Initially, the role will require onsite presence in Bristol, UK for approximately 1 month) Contract - Inside IR35 About HCLTech HCLTech is a global technology leader delivering services across Digital, Engineering, Cloud ...

Description: Functional Validation of a new SOC designed with high end ARM processors Functional Bring-up of SOC interfaces like – LPDDR, Ethernet, PCIe, HBM, CPU’s, Low speed Ios (UART, I2C, I3C, SPI), Coherent Mesh etc. Develop bare metal C tests and debug using FPGA HAPS/Zebu emulation … high speed protocol experience (PCIe Gen6, die to die links, LPDDR5, HBM3), ARM high end CPUs, ARM cache coherent interconnect protocol, and validation experience on pre/post Si platforms. Desirable skills: Python, Silicon SOC bring-up, High speed interface device drivers ...