1 of 1 Contract Altera Jobs in Cambridgeshire

VHDL Translate novel functional computing models into optimised RTL architectures Implement high-throughput, pipelined digital logic and memory interfaces Contribute to simulation, synthesis, debug, and validation of designs on Altera Agilex FPGAs and/or AMD Xilinx Versal Collaborate on architectural evaluation of latency, power, and scalability Write clean, maintainable RTL and contribute to documentation, DFT/DFM, and … SystemVerilog and/or VHDL Tech Stack: Quartus Prime Pro, Vivado, ModelSim, QuestaVerilog, SystemVerilogC, C++, Python, Haskell, Erlang, TCLGit, Jira Desirables:PCI3 Gen 6 experience Experience with Intel/Altera Agilex 5E FPGAsVHDLExposure to compute-in-memory, functional or dataflow architectures UVM or equivalent verification experience More ❯