5 of 5 Contract UVM Jobs in England

improve ways of working What You'll Be Doing Designing innovative VHDL-based FPGA architectures Applying advanced verification techniques (VHDL/System Verilog/UVM) Working with current FPGA technologies (Xilinx, Altera, Microsemi) Using model-driven engineering tools such as MATLAB & Simulink Designing and integrating high-speed interfaces (PCIe, DDR3 ...

wide FPGA/Firmware delivery teams. Key Skills : • Creating innovative VHDL based FPGA designs • Advanced verification techniques using either VHDL or SystemVerilog/UVM • Current FPGA technologies from either Xilinx, Altera or Microsemi and their tools • Model Driven Engineering tools including MATLAB and Simulink • High Speed Interface Design & Integration, including ...

wide FPGA/Firmware delivery teams. Key Skills : • Creating innovative VHDL based FPGA designs • Advanced verification techniques using either VHDL or SystemVerilog/UVM • Current FPGA technologies from either Xilinx, Altera or Microsemi and their tools • Model Driven Engineering tools including MATLAB and Simulink • High Speed Interface Design & Integration, including ...

wide FPGA/Firmware delivery teams. Key Skills : • Creating innovative VHDL based FPGA designs • Advanced verification techniques using either VHDL or SystemVerilog/UVM • Current FPGA technologies from either Xilinx, Altera or Microsemi and their tools • Model Driven Engineering tools including MATLAB and Simulink • High Speed Interface Design & Integration, including ...

system-level designs including RISC-V cores, cryptographic IP (OTBN), and key peripherals (USB, I2C, SPI). Key Responsibilities Develop and debug SystemVerilog/UVM testbenches Create verification plans, tests, and coverage Review contributions and resolve regressions Support CI/test infrastructure Collaborate with partners through tapeout Requirements 5+ years … industry verification experience Strong SystemVerilog and UVM Full verification lifecycle experience through tapeout C and/or Python for automation Git/GitHub collaboration Desirable: Formal verification (Jasper), RISC-V/ISA knowledge, security verification, silicon bring-up, or technical leadership experience. ...