2 of 2 Remote/Hybrid Contract FPGA Jobs

have Space/Satellite experience (Phases B, C, D). OBC (On-Board Computer), MMFU (Mass Memory), and RIU (Remote Interface Unit). Hardware: FPGA/ASIC design. Communication Protocols: SpaceWire , MIL-STD-1553 , or CAN bus . Master's degree in electrical engineering or a comparable field such ...

Description: Role: Senior IP Design Engineer Type: Contract Location: Belfast, UK Hybrid Job details: Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements. Key Skills: SystemVerilog RTL design 100Gb Ethernet, PCIe Gen5, AMBA/AXI Deep understanding … FPGA/Adaptive SoC design flow including P&R and timing closure Vivado/Vitis expertise Python/Tcl scripting Git & CI/CD experience ...