7 of 7 Permanent Cadence Jobs in Cambridge

with cross-functional teams to enable system bring-up, debug, and feature validation on emulation platforms. Support compilation, deployment, and debug flows for emulation systems such as Synopsys ZeBu, Cadence Palladium, and Siemens Strato. Solve simulation/emulation mismatches and system-level test failures. Work closely with EDA vendors to deploy new capabilities, resolve tool issues, and influence future More ❯

coding and verification. Proficiency in RTL design techniques, including synthesis, timing closure, and verification. Experience in using UVM for functional verification of ASIC designs. Experience with EDA tools like Cadence and Synopsys for design simulation and verification. Extensive experience with FPGA emulation, design tools, and verification. Contact: For further information please contact Mícheál at Software Placements on More ❯

methodologies to improve GPU power, performance and area (PPA). Required Skills and Experience : Experience with hardware description languages (System Verilog preferable). Experience using EDA simulators (Siemens, Synopsys, Cadence) Strong problem solving and debugging skills, and ability to closely collaborate with other teams. Experience working with version control and code review systems such as Git and Gerrit Proficiency More ❯

with EDA tool vendors to troubleshoot tool-related challenges and improve design outcomes. Manage and prioritize your workload to meet project milestones and objectives. Required Experience & Tools: Experience with Cadence tools such as Genus, Innovus, Tempus, QRC, and Conformal. Proficient in physical design flows including synthesis, logical equivalence checking (LEC), floorplanning, placement, clock tree synthesis (CTS), routing, and STA. … Python, or Perl to support project workflows. Keywords: Physical Design, RTL, Place and Route (PnR), Static Timing Analysis (STA), Logical Equivalence Checking (LEC), Low Power Design, Power Gating, DVFS, Cadence Genus, Cadence Innovus, Cadence Tempus, QRC, Conformal, Synopsys Fusion Compiler, Formality, Synthesis, Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, UPF, Constraint Development, EDA Tools, Automation Scripting, TCL More ❯

across a portfolio of design tools. This role offers an exciting opportunity to work at the intersection of computational software and artificial intelligence, helping to shape the future of Cadence's innovative solutions. Responsibilities: Contribute to the development of AI infrastructure that supports inference, prompt engineering, fine-tuning, and model quantization. Assist in developing software systems and libraries to More ❯

validation Technical documentation What We're Looking For: Prior industry experience in mixed signal IC design Solid background in CMOS technology and processes Experience with EDA tools such as Cadence and SPICE Strong communication and problem-solving skills Low-power design experience If you're interested in making an application to the Mixed Signal Design Engineer opportunity or would More ❯

and external teams, facilitating communication between IC and module design functions. Bachelor's or master's degree in electrical engineering, microelectronics, or something similar. Extensive hands-on experience with Cadence design tools; familiarity with ADS Momentum/RF Pro and Mentor Graphics DRC/LVA/PEX is a plus. Deep expertise in RF IC design using various silicon More ❯