4 of 4 Permanent Design Engineer Jobs in Cambridge

Title : Junior Electronic Design Engineer Location : Cambridge (Hybrid Working - 3 Days On-Site Per Week) Salary : £35,000 - £45,000 + Bonus & Benefits (Depending on Experience) Please Note : All Applicants must have the right to work in the UK without the need for VISA sponsorship … future. Role Overview: Zenovo are looking for an Junior Electronic Design Engineer to join their client in Cambridge who design and manufacture globally recognised consumer electronics.An ideal candidate will have at least 1-Year of Experience outside of University however we are happy to consider candidates ...

week, flexible working, including up to 3 days per week working from home Salary: Competitive Job Reference: 36054 We are seeking an experienced FPGA Design Engineer to join our client's expanding development team, based a few miles north of Cambridge. You will be working on high performance … Requirements: - Strong knowledge of SystemVerilog - Experience with Python - Proven background in RTL verification - Ability to write and validate timing constraints - Understanding of low power design principles - Experience writing module specifications and reviewing technical documentation - Code and documentation review to established standards - Familiarity with: * Linux command line * Version control systems ...

Senior FPGA RTL Engineer Location: Cambridge (Flexible/Hybrid) Salary: £150k+ bonus My client is an innovative technology company developing cutting-edge, high-performance systems for demanding real-time applications. As part of continued growth and investment in next-generation platforms, they are seeking an experienced Senior FPGA … Engineer to join their engineering team. This is an excellent opportunity to work on technically challenging projects where performance, reliability and optimisation are critical. You'll play a key role in shaping future FPGA architectures and mentoring engineers within a highly skilled development environment. The Role As a Senior ...

exciting opportunity has just opened for a Senior/Lead Verification Engineer to join a cutting-edge team in Cambridge, UK, driving innovation in next-gen semiconductor projects Our client is expanding their DV team at a key growth stage, offering a rare opportunity to join early and genuinely … collaboration with world-leading partners such as Google. This is real silicon used as a foundation for secure and scalable compute systems. Key Responsibilities Design, implement, and debug block/system-level tests and testbenches using SystemVerilog and UVM Develop test and coverage plans for new and updated designs ...