5 of 5 Permanent Verilog Jobs in Cambridge

have the autonomy to solve technical challenges, drive integration, and influence design direction on high-impact projects. Requirements Strong FPGA design experience (Verilog/VHDL, Vivado/Quartus). Proven background in digital design, implementation, and system integration. Experience with AMD/Xilinx or Intel/Altera FPGA platforms. Skilled ...

take technical ownership, collaborate effectively, and deliver complex projects Position: Senior FPGA Engineer Location: Cambridge Salary: £70k–£120k + equity Key Skills: FPGA, DSP, Verilog/VHDL, Desirable: RF experience ...

scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems. Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools. Knowledge of logic design principles along with timing and power implications. Understanding ...

strong supporting A-level (or equivalent) grades Substantial expertise in front end RTL design and verification, skills in RTL simulation and Synthesis tools, System Verilog Previous success in managing complex projects, requirement capture, and interfacing with internal and external stake holders Coding skills (ideally in C++, C, Python … offices Cambridge office, they offer a highly competitive salary and an excellent benefits package, including performance-related bonus. Keywords: Hardware Design, Verification, RTL, System Verilog, Simulation, C++ Another top job from ECM, the high-tech recruitment experts. Even if this job's not quite right, do contact ...

team to explore and implement high-performance CPU strategies. Transform high-level architectural research into detailed, implementable technical specifications. Design, assess, and refine RTL (Verilog/VHDL) to hit aggressive timing, area, and power goals. Partner with the DV team to ensure the design meets both functional correctness and performance … tape-out. Key requirements: Thorough knowledge of areas like Instruction Fetch/Decode, Out-of-Order Execution, and Memory Subsystems. Strong proficiency in Verilog and/or VHDL and waveform debugging. Solid understanding of logic design principles and their implications on timing and power. Understanding of register renaming, instruction scheduling ...