5 of 5 Permanent ASIC Jobs in the East of England

potential solutions and drive execution. Minimum Qualifications BSc/MSEE/M Eng/BEng or equivalent is required Exposure in any aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place & Route and all aspects of timing, electrical and physical signoff. Preferred Qualifications Experience with ...

functional engineering environment. Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with relevant experience in ASIC, CPU, or physical design implementation. Master’s degree with relevant hardware engineering experience, or a PhD with relevant CPU/ASIC/physical implementation experience. … Preferred Qualifications Physical design experience on CPU cores, high‐performance compute blocks, or timing‐critical ASIC designs. Experience working in advanced semiconductor process nodes, especially 7nm and below. Strong understanding of CPU PPA optimization and design convergence. Experience with low‐power design techniques, clock optimization, useful skew, standard‐cell library ...

used by millions of developers, educators, engineers, and hobbyists worldwide. The company focuses on accessible, high-performance computing and is expanding its in-house ASIC capability to support an exciting product roadmap. This role suits someone who works autonomously within a collaborative team and enjoys ownership. The leadership team … working culture are strong. The Opportunity As part of a growing ASIC team, you will contribute to the development of next-generation silicon products. Working within a small, highly collaborative group, you will gain exposure across the complete silicon development lifecycle, from architecture and specification through design, verification, implementation, test ...

Resources is seeking a Senior DFT Engineer to join our ASIC team. You will shape DFT strategies across chip, subsystem, and IP levels, balancing structural and functional methods while delivering robust production-ready designs. The role involves hands-on use of Tessent DFT flows for MBIST, EDT, SSN, and IJTAG ...

Leader - Base, RSUs, Bonus - 5 days onsite A rare opportunity has opened for a CPU ASIC Design Engineer to join one of the world’s most influential semiconductor companies at its flagship UK design centre in Cambridge. You’ll become part of an elite engineering organisation developing the technology behind … alongside leading architects and design teams to shape high-performance, low-power processor technology from early concept through to silicon delivery. As a CPU ASIC Design Engineer, you’ll play a key role in CPU RTL development, contributing to architectural exploration, microarchitecture definition, and complex implementation challenges where power, performance ...