19 of 19 Permanent VHDL Jobs in the East of England

/C++/System C Bonus/"nice-to-have" skills: Industry experience in RTL design/RTL coding/digital design/hardware design - for FPGA/ASIC (VHDL and/or Verilog, System verilog) Digital Verification (UVM/system verilog) OR Formal verification methods - Jasper Gold, C/system C Definition of complex architecture High-speed digital connectivity More ❯

/C++/System C Bonus/"nice-to-have" skills: Industry experience in RTL design/RTL coding/digital design/hardware design - for FPGA/ASIC (VHDL and/or Verilog, System verilog) Digital Verification (UVM/system verilog) OR Formal verification methods - Jasper Gold, C/system C Definition of complex architecture High-speed digital connectivity More ❯

/C++/System C Bonus/"nice-to-have" skills: Industry experience in RTL design/RTL coding/digital design/hardware design - for FPGA/ASIC (VHDL and/or Verilog, System verilog) Digital Verification (UVM/system verilog) OR Formal verification methods - Jasper Gold, C/system C Definition of complex architecture High-speed digital connectivity More ❯

HyperLynx (signal integrity analyses) or similar. Additional experience with radio frequency systems, DSP, embedded software and/or requirements management using DOORS would be beneficial. Further experience with C++, VHDL, Python and Tcl would be desirable. Due to the nature of projects, the role is mostly onsite, although occasional home working is possible when projects allow. In return, on offer More ❯

development and signal processing theory Commercial experienceof Radio Systems design withexposure to GNSS, Smart Antennas, Beamforming and Jammers all highly beneficial Proficiency in MATLAB, Python, C/C++, or VHDL/Verilog for simulation and implementation Understanding of real-time systems and embedded platforms Key Responsibilities of the Senior Radio SystemsEngineer: Design and implementation of radio communication systems with a More ❯

signal processing theory Commercial experience of Radio Systems design with exposure to GNSS, Smart Antennas, Beamforming and Jammers all highly beneficial Proficiency in MATLAB, Python, C/C++, or VHDL/Verilog for simulation and implementation Understanding of real-time systems and embedded platforms Key Responsibilities of the Senior Radio Systems Engineer: Design and implementation of radio communication systems with More ❯

in complex, high speed digital electronics design. Experience in MPSoC FGPA, DDR and Flash memory and high speed serial interconnect design Experience in SI and PI Analysis Proficiency in VHDL to support board level test and debug Proficiency in C, C++, or Python to support board level test and debug Familiarity with DSP concepts for SDR, radar signal processing and More ❯

in complex, high speed digital electronics design. Experience in MPSoC FGPA, DDR and Flash memory and high speed serial interconnect design Experience in SI and PI Analysis Proficiency in VHDL to support board level test and debug Proficiency in C, C++, or Python to support board level test and debug Familiarity with DSP concepts for SDR, radar signal processing and More ❯

. Strong knowledge of MPSoC FPGA , DDR and Flash memory , and high-speed serial interconnect design . Experience with Signal Integrity (SI) and Power Integrity (PI) analysis. Proficiency in VHDL for board-level testing and debugging. Working knowledge of C, C++ or Python for board-level test and debug support. Familiarity with DSP concepts used in SDR, radar signal processing More ❯

. Strong knowledge of MPSoC FPGA , DDR and Flash memory , and high-speed serial interconnect design . Experience with Signal Integrity (SI) and Power Integrity (PI) analysis. Proficiency in VHDL for board-level testing and debugging. Working knowledge of C, C++ or Python for board-level test and debug support. Familiarity with DSP concepts used in SDR, radar signal processing More ❯

. Strong knowledge of MPSoC FPGA , DDR and Flash memory , and high-speed serial interconnect design . Experience with Signal Integrity (SI) and Power Integrity (PI) analysis. Proficiency in VHDL for board-level testing and debugging. Working knowledge of C, C++ or Python for board-level test and debug support. Familiarity with DSP concepts used in SDR, radar signal processing More ❯

require an experienced FPGA Engineer to undertake a long term contract. In order to be successful, you will have the following experience: Strong FPGA Engineering background, with skills in VHDL/Verilog Solid understanding of electronics and hardware systems, including interactions between software and hardware (e.g., RF over Ethernet) Experience working with AMD ZynqTM UltraScale+TM MPSoCs, ideally with functions partitioned More ❯

require an experienced FPGA Engineer to undertake a long term contract. In order to be successful, you will have the following experience: Strong FPGA Engineering background, with skills in VHDL/Verilog Solid understanding of electronics and hardware systems, including interactions between software and hardware (e.g., RF over Ethernet) Experience working with AMD ZynqTM UltraScale+TM MPSoCs, ideally with functions partitioned More ❯

require an experienced FPGA Engineer to undertake a long term contract. In order to be successful, you will have the following experience: Strong FPGA Engineering background, with skills in VHDL/Verilog Solid understanding of electronics and hardware systems, including interactions between software and hardware (e.g., RF over Ethernet) Experience working with AMD ZynqTM UltraScale+TM MPSoCs, ideally with functions partitioned More ❯

and systems teams to deliver high-performance solutions Stay at the forefront of FPGA technology and help shape our roadmap What we're looking for Strong FPGA design background (VHDL/Verilog/SystemVerilog) Experience leading or mentoring engineering teams Proven delivery of complex FPGA systems Solid grasp of RTL design, timing closure, verification, and integration Confident communicator who thrives More ❯

VHDL/FPGA Engineer – Contract Location: Hybrid – Cambridge (2–3 days on site per week) Clearance: Minimum SC Clearance required, ideally DV Cleared Initial Length: 6 Months Overview We are seeking an experienced FPGA Engineer to join a small, cross-functional development team working on cutting-edge digital radio and signal processing technologies. The successful candidate will be responsible for … documentation, including system architectures, design specifications, and development processes. Collaborate closely with multidisciplinary teams to resolve complex technical challenges efficiently. Essential Skills & Experience Strong proficiency in C, C++ , and VHDL/Verilog (bias toward either embedded software or FPGA is acceptable). Solid understanding of electronics and hardware , including how hardware and software interact (e.g., RF over Ethernet). Experience More ❯

VHDL/FPGA Engineer – Contract Location: Hybrid – Cambridge (2–3 days on site per week) Clearance: Minimum SC Clearance required, ideally DV Cleared Initial Length: 6 Months Overview We are seeking an experienced FPGA Engineer to join a small, cross-functional development team working on cutting-edge digital radio and signal processing technologies. The successful candidate will be responsible for … documentation, including system architectures, design specifications, and development processes. Collaborate closely with multidisciplinary teams to resolve complex technical challenges efficiently. Essential Skills & Experience Strong proficiency in C, C++ , and VHDL/Verilog (bias toward either embedded software or FPGA is acceptable). Solid understanding of electronics and hardware , including how hardware and software interact (e.g., RF over Ethernet). Experience More ❯

implementation, simulation, verification and test) Strong background in Digital Signal Processing (DSP) design and optimisation Excellent academic background with a degree from a top university Proficiency in SystemVerilog or VHDL Experience with high-speed external interfaces (e.g. PCIe, Aurora, Ethernet, SPI) Proven ability to take technical ownership, collaborate effectively, and deliver complex projects Position: Senior FPGA Engineer Location: Cambridge Salary … 70k£160k + equity Key Skills: FPGA, DSP, Verilog/VHDL, high-speed interfaces Desirable: RF experience More ❯

implementation, simulation, verification and test) Strong background in Digital Signal Processing (DSP) design and optimisation Excellent academic background with a degree from a top university Proficiency in SystemVerilog or VHDL Proven ability to take technical ownership, collaborate effectively, and deliver complex projects Position: Senior FPGA Engineer Location: Cambridge Salary: £70k–£120k + equity Key Skills: FPGA, DSP, Verilog/VHDL More ❯