4 of 4 Permanent Validation Engineer Jobs in the East of England

company Neoverse‐based platforms. Tasks range from initial verification on pre‐silicon platforms to production‐quality firmware and software on real silicon. The staff engineer will provide technical and people leadership for a focus group, responsible for proving system readiness, software quality, release confidence, and customer‐facing adaptability across … complex platform work. We are looking for a staff engineer with strong system software expertise, extensive system‐wide knowledge, and a deep passion for quality, validation, and testing. This person will develop the process for validating complex firmware and platform software across the full system. Validation covers ...

About the Role An exciting opportunity has arisen to join a growing Systems Integration and Validation team focused on delivering high-quality software-based simulation, modelling and experimentation solutions. This role offers the chance to contribute to the integration, testing and validation of complex simulation products used within … collaborative and multidisciplinary team, you will play a key role in ensuring software products meet customer requirements and are ready for deployment. Test & Validation Planning Understand customer and project requirements from a test and validation perspective Analyse system architectures and define software test environment requirements Develop comprehensive test ...

United States Digital Space LLC is seeking a staff engineer to lead validation for Neoverse‐based platforms. You will drive end‐to‐end verification, quality assurance, and release confidence across pre‐silicon and post‐silicon environments. You will collaborate with architecture, firmware, software, hardware, and program teams … validation requirements, metrics, and readiness criteria, and you will mentor engineers to raise the bar on engineering excellence. #J-18808-Ljbffr ...

Resources is seeking a Senior DFT Engineer to join our ASIC team. You will shape DFT strategies across chip, subsystem, and IP levels, balancing structural and functional methods while delivering robust production-ready designs. The role involves hands-on use of Tessent DFT flows for MBIST ...