2 of 2 Permanent UVM Jobs in Glasgow

project delivery Expertise in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in C for FPGA testing and embedded system More ❯

Siemens - QuestaSim/ModelSim, Questa PropCheck, FormalPro Synopsys - Synplify Pro Standards, Frameworks and Techniques Knowledge and experience of safety standards such as IEC 61513, IEC 62566, IEC26262, DO 254 UVM Constrained Random Testing Formal Verification Languages: VHDL, SystemVerilog, TCL, Python We're an equal opportunities employer. We're committed to developing a diverse workforce and an inclusive working environment. We More ❯