6 of 6 Permanent VHDL Jobs in the North East

in our Design Centre in Edinburgh, Scotland. JOB RESPONSIBILITIES: Concept definition of digital SOC architecture & blocks Specification writing RTL design & verification ((System)Verilog/VHDL/FPGA) Close working with analog IC designers and sub-contractors Experience with design synthesis, timing closure & STA is highly desirable Support DfT strategy & implementation More ❯

verification. • Ensuring all firmware designs follow established processes. Required Skills and Experience: • Experience in design techniques using VHDL. • Experience in verification techniques using either VHDL or System Verilog/UVM. • Experience in specifying timing and area constraints for efficient FPGA place and route. • Ability to analyze system-level requirements and More ❯

IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/UVVM (or More ❯

IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/UVVM (or More ❯

today. Key Responsibilities Define digital architecture and block-level concepts Develop detailed specifications for digital functions RTL design and verification using SystemVerilog, Verilog, or VHDL Collaborate closely with analog IC designers and subcontractors Debug RTL and gate-level simulation failures Write scripts in Python, Perl, or similar for automation and More ❯

needed during the testing phase of the project. In order to suit the project requirements you should have some of the following: Expertise in VHDL/SystemsVerilog Writing detailed verification test plans Developing design verification test benches for FPGA modules/systems This is requirement is due to start mid More ❯