14 of 14 Permanent VHDL Jobs in Oxford

FPGA based signal processing and control functions and develop functional block specifications based on system level requirements Perform logic design using Vivado (Verilog or VHDL, IP Catalog, and Block Design as well as perform logic simulation/verification using simulation/verification software Simulate signal processing and control algorithms ...

hardware, firmware, and software. Collaborate with multidisciplinary teams to deliver next-generation quantum technologies. What We’re Looking For: Strong experience in FPGA programming (VHDL/Verilog/SystemVerilog) and DSP implementation. Knowledge of digital and RF hardware, with hands-on experience in embedded systems. Experience with standard hardware interfaces ...

Staff FPGA Engineer with the following background: 10+ years of hands-on FPGA development experience Strong RTL design and verification using SystemVerilog, Verilog, or VHDL Extensive FPGA-based DSP experience, including DDC/DUC, DDS and FIR/IIR filtering Experience with Xilinx UltraScale+ MPSoC platforms Modelling and simulation using ...

complex probabilistic algorithms from Python, C++, MATLAB and pseudocode into highly pipelined, resource-efficient FPGA RTL designs Design and implement custom digital logic in VHDL from scratch where vendor IP is unsuitable, introduces latency or creates bottlenecks Architect and integrate high-speed data acquisition pipelines utilising ultra-fast ADCs, PCIe ...

complex probabilistic algorithms from Python, C++, MATLAB and pseudocode into highly pipelined, resource-efficient FPGA RTL designs Design and implement custom digital logic in VHDL from scratch where vendor IP is unsuitable, introduces latency or creates bottlenecks Architect and integrate high-speed data acquisition pipelines utilising ultra-fast ADCs, PCIe ...

/Python/C++/MATLAB, into highly pipelined, resource-efficient FPGA RTL. RTL design from scratch: Design and implement custom digital logic using VHDL where off-the-shelf vendor IPs are insufficient, bottlenecked, or introduce latency. High-speed I/O integration: architect data acquisition pipelines interfacing with ...

implementation experience (forward error correction, clock recovery, zero copy etc) IoT or cloud software integration and protocols, such as MQTT Experience in FPGA development, VHDL or Verilog Yocto Linux/Petalinux or buildroot build experience Rust development experience Control systems, Matlab/Simulink, including Embedded coder/HDL code generation ...

implementation experience (forward error correction, clock recovery, zero copy etc) IoT or cloud software integration and protocols, such as MQTT Experience in FPGA development, VHDL or Verilog Yocto Linux/Petalinux or buildroot build experience Rust development experience Control systems, Matlab/Simulink, including Embedded coder/HDL code generation ...

system bring-up. Essential Experience & skills: 5+ years of industry experience developing FPGA-based DSP or communications systems; strong FPGA design experience using VHDL, Verilog, or SystemVerilog; strong understanding of fixed-point arithmetic, quantisation effects, numerical precision, and hardware implementation trade-offs; experience implementing high-performance parallelised DSP algorithms ...

looking for an FPGA Engineer with the following background: Degree in Electronics, Computer Engineering, Computer Science, or a related discipline RTL development experience using VHDL or Verilog Experience implementing digital systems on modern FPGA or SoC platforms Understanding of digital design fundamentals including synthesis and timing closure Experience with simulation ...

control functions across RTL design, verification, modeling, hardware testing and debugging. The role requires 10+ years FPGA experience, strong SystemVerilog/Verilog/VHDL RTL skills, DSP expertise (DDC/DUC, DDS, FIR/IIR), Xilinx MPSoC familiarity, and hands-on debugging with lab equipment. #J-18808-Ljbffr ...

most advanced quantum systems. You will design, verify, and test FPGA-based signal processing and control modules, with strong emphasis on Verilog/VHDL, SystemVerilog and high-performance embedded solutions, in a collaborative, fast-moving team environment. #J-18808-Ljbffr ...

senior FPGA engineer to translate probabilistic models into high-performance RTL and integrate with analogue front ends. You will design from scratch in VHDL/Verilog, work with PS/PL architectures, and ensure timing closure across clock domains. Strong HDL, lab debug, and FPGA toolchain experience are essential. This ...

networking equipment. Ensure all FPGA designs achieve required level of timing closure and functional performance before release. Code reviews of existing and new VHDL/Verilog files. Working alongside a team comprising of electronic, mechanical and software design engineers in the creation of high performing and cost-effective solutions. Ensuring … compliance. Full product lifecycle involvement from early conceptual studies through to manufacturing support post-release. Required Skills, Knowledge and Expertise Strong demonstrable experience in VHDL including implementation of algorithms. Verilog experience an advantage. Experience in compilation timing closure is essential. Working knowledge of interface standards such as LVDS, PCIE, GMII ...