1 to 25 of 48 Permanent ASIC Jobs in the South East

Hands‐on experience in digital IC design using Verilog, SystemVerilog, and/or VHDL Desirable experience: Mixed signal design exposure Familiarity with the full ASIC front‐end and back‐end flow Python scripting Experience using tools such as JIRA and Confluence Apply below! #J-18808-Ljbffr ...

debugging and proficient with complex laboratory equipment such as signal generators, oscilloscopes, and spectrum analyzers. You'd Be a Great Fit With Experience with ASIC design and tapeout process Experience implementing digital control (PID, feedforward, MIMO) algorithms in FPGA firmware Prior experience with high speed interface design and verification including ...

development teams (in the UK and Japan) by providing reference models (including bit-true models where necessary) for real-time software and FPGA/ASIC testing and verification.Researching emerging technologies to support NEC’s product planning and sales activities. Applying AI/ML techniques, particularly agentic AI, to automate ...

environment and verify integration.Excellent debugging and analytical skills.Proficiency in scripting languages and utilities including Makefile, Python, TCL/tsh, Perl etc.10-15 years in ASIC design verification.Additional Preferred QualificationsExperience with HW emulation or FPGA prototypingLow power methodologies , e.g. UPFExperience in behavioural modelling of analogue circuitsExperience in verifying processor based designsKnowledge ...

oscilloscopes and other lab equipment Experience with JESD204B, ADC/DAC interfaces, DDR3/4, 10Gb Ethernet, digital control algorithms, embedded Linux, or ASIC development would be advantageous. This is an opportunity to take significant technical ownership while working at the forefront of one of the fastest-developing areas ...

This fast-growing fabless semiconductor company developing mixed-signal ASIC solutions across wireless, automotive, medical, and industrial markets is currently searching for an IC Test Development Engineer. Key Responsibilities Develop semiconductor test solutions including ATE test programs, loadboards, sockets, and hardware for platforms such as Advantest V93K, Teradyne ...

colleagues across architecture, algorithms, software and verification. Key responsibilities Lead, mentor and develop a team of digital design engineers Provide technical leadership across complex ASIC and FPGA development projects Remain hands on with RTL design and contribute to architectural and implementation decisions Take ownership of project delivery, ensuring designs meet ...

At Universal Quantum, we aim to make the world a better place by developing a new computer technology. Together, we are creating truly impactful quantum computers. Our machines will be capable of solving problems until ...

speed data acquisition pipelines utilising ultra-fast ADCs, PCIe, high-speed Ethernet and transceiver technologies Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions Develop robust verification environments, perform hardware bring-up activities and optimise timing, power and resource utilisation across ...

speed data acquisition pipelines utilising ultra-fast ADCs, PCIe, high-speed Ethernet and transceiver technologies Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions Develop robust verification environments, perform hardware bring-up activities and optimise timing, power and resource utilisation across ...

Strong HDL, lab debug, and FPGA toolchain experience are essential. This role offers collaboration with academia and industry, tackling real-world probabilistic computing and ASIC-tapeout preparation. #J-18808-Ljbffr ...

Yoh, A Day & Zimmermann Company is seeking a Senior Verification Engineer to own UVM-based verification across complex communications IP, taking it from specification through to sign-off. You will work with architects, RTL designers ...

seeking a Principal Design Team Leader to steer the hardware design of 5G base station and space-qualified IP. You will guide RTL/ASIC/FPGA development, drive delivery, and ensure robust verification, with a focus on power efficiency and performance. The role requires hands-on leadership, collaboration with ...

will shape system-level designs bridging ASICs, SerDes, and photonics across packaging and interconnects. The role requires deep expertise in high‐speed SerDes, ASIC architectures, and optical systems, with cross‐functional collaboration to deliver high-bandwidth, low-power interconnects. #J-18808-Ljbffr ...

electrical and optical domains, focusing on SerDes‐based links, photonics integration, and advanced packaging. The role requires a deep background in high‐speed SerDes, ASIC/SoC architectures, and optical systems, with cross‐functional collaboration across semiconductor, photonics, and packaging teams. #J-18808-Ljbffr ...

deliver accurate, verified designs within project timescales. Desirable CMOS Readout IC (ROIC) experience. Imaging IC or image sensor design. Infrared detector electronics. Semiconductor, ASIC or mixed-signal design experience. If you are an experienced Analogue IC Design Engineer looking for a challenging opportunity within aerospace and defence, we would like ...

with the potential to extend mobile coverage across the globe. This could be an excellent opportunity for an existing RTL Design Lead, FPGA/ASIC Team Lead, Principal RTL Engineer, Principal Digital Design Engineer or experienced FPGA/ASIC Engineer looking to take on greater technical and team leadership responsibility. … hands-on position combining RTL design, technical leadership and team development , with responsibility for delivering complex Layer 1 IP targeting FPGA and ASIC platforms. The Role As RTL Design Team Lead, you'll lead a talented hardware design team while remaining closely involved in the technical development and delivery ...

with the potential to extend mobile coverage across the globe.This could be an excellent opportunity for an existing RTL Design Lead, FPGA/ASIC Team Lead, Principal RTL Engineer, Principal Digital Design Engineer or experienced FPGA/ASIC Engineer looking to take on greater technical and team leadership responsibility.They … hands-on position combining RTL design, technical leadership and team development, with responsibility for delivering complex Layer 1 IP targeting FPGA and ASIC platforms.The RoleAs RTL Design Team Lead, you'll lead a talented hardware design team while remaining closely involved in the technical development and delivery of complex IP.You ...

Senior Verification Engineer Department: Hardware Employment Type: Full Time Location: Southampton, UK Reporting To: Tom Hollis Description Our RTL team delivers efficient ASIC and FPGA implementations of advanced communications algorithms, working across IP development, integration and verification. To support this work, we are looking for a Senior Verification Engineer … implementations for advanced wireless communications IP and modem subsystems, ensuring designs meet functional, performance and quality requirements prior to FPGA deployment and ASIC tape-out. Key Responsibilities Develop verification plans from design and architecture specifications. Create and maintain SystemVerilog/UVM verification environments. Develop testbenches, assertions, scoreboards and coverage models. ...

product requirements into hardware team deliverables Support discussions with customers during presales and product development Oversee the implementation of designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches Lead AccelerComm's engineering methodology, processes, and design techniques, integrating AI where possible. Nurture … feedback Skills, Knowledge and Expertise Track record of building and leading high performing collaborative teams Expert knowledge of RTL design (Verilog, SystemVerilog) for complex ASIC and FPGA products A strong skillset in delivery of digital designs for ASIC and FPGA Optimisation of timing and hardware resources for high throughput data ...

coverage. Working as part of a highly skilled engineering team, you'll be involved in the design and implementation of high-performance FPGA and ASIC solutions, taking products from architecture through to validation on the latest space-qualified hardware platforms. Key responsibilities include: Translating system and algorithm requirements into … micro-architectures Designing and implementing RTL using Verilog/SystemVerilog for FPGA and ASIC targets Creating testbenches and supporting functional verification Deploying and validating designs on FPGA development platforms Optimising designs for performance, timing, power, and resource utilisation Producing high-quality technical documentation Collaborating across architecture, verification, physical implementation ...

seeking an experienced candidate to lead the miniaturisation of our cutting-edge probabilistic computing platform. This role is pivotal in defining and executing the ASIC strategy, ensuring optimal integration with other processing units such as FPGAs and GPUs. You will work closely with hardware engineers, algorithm designers, and fabrication partners … qualified international candidates to apply for this role. We have offices in Oxford and London, and are open to other international locations. Key Responsibilities ASIC strategy & architecture Assess system components to determine which should be implemented as ASIC versus FPGA or GPU. Define ASIC architecture in alignment with overall system ...

Algorithm and System Architecture teams to understand requirements and translate them into micro‐architectures for RTL implementations Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of appropriate testbenches Deploy your designs onto the latest FPGA development platforms for validation and system integration Actively engage … design flow and the final product Collaborate with colleagues across the whole design flow: micro‐architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge & Expertise Essential Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital ...

tackling one of the toughest challenges in wireless communications: putting full 5G base stations into orbit. That means designing high‐performance FPGA and ASIC hardware capable of delivering real‐time, high‐throughput digital signal processing on space‐qualified devices. This is a hands‐on engineering role focused on RTL design … development using Verilog or SystemVerilog High‐speed, high‐throughput digital hardware or DSP implementations Timing closure, synthesis and hardware optimisation Complex FPGA or ASIC development projects Experience with wireless communications, UVM, Python or AMBA would be advantageous, but isn’t essential. Why join? Because opportunities like this don’t come ...

high-throughput computer host architectures via PCIe and high-speed Ethernet. System architecture: Work closely with hardware and software engineers, the research team, and ASIC architects to develop the high-level system architecture. Verification & bring-up: Develop rigorous testbenches and simulations to ensure compliance with functional and timing requirements. Participate … approach. Demonstrated experience with implementing stochastic problems, optimisation algorithms, neural network, or artificial intelligence/machine learning algorithms into hardware. Direct experience with the ASIC design flow: act as the critical bridge towards custom silicon by prototyping, emulating, and validating our probabilistic computing architectures on FPGA platforms prior to ASIC ...