1 to 25 of 50 Permanent Verilog Jobs in the South West

considerations in hardware design. Experience using PCIe, CXL, RDMA, DDR4, bare metal use of high-speed transceivers, Ethernet, IP. Excellent skills in SystemVerilog/Verilog/VHDL. The company offer an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology and a great team More ❯

I/O like GTM and F-Tile transceivers Expertise in FPGA tool flows: synthesis, partitioning, place & route, timing analysis Strong skills in SystemVerilog, Verilog, VHDL, and scripting (tcl and Python) Experience with high-performance FPGA devices such as Xilinx Versal Premium or Intel Agilex 7 If you're interested More ❯

I/O like GTM and F-Tile transceivers Expertise in FPGA tool flows: synthesis, partitioning, place & route, timing analysis Strong skills in SystemVerilog, Verilog, VHDL, and scripting (tcl and Python) Experience with high-performance FPGA devices such as Xilinx Versal Premium or Intel Agilex 7 If you're interested More ❯

firmware designs follow established processes. Required Skills and Experience: • Experience in design techniques using VHDL. • Experience in verification techniques using either VHDL or System Verilog/UVM. • Experience in specifying timing and area constraints for efficient FPGA place and route. • Ability to analyze system-level requirements and derive detailed firmware More ❯

firmware designs follow established processes. Required Skills and Experience: • Experience in design techniques using VHDL. • Experience in verification techniques using either VHDL or System Verilog/UVM. • Experience in specifying timing and area constraints for efficient FPGA place and route. • Ability to analyze system-level requirements and derive detailed firmware More ❯

firmware designs follow established processes. Required Skills and Experience: • Experience in design techniques using VHDL. • Experience in verification techniques using either VHDL or System Verilog/UVM. • Experience in specifying timing and area constraints for efficient FPGA place and route. • Ability to analyze system-level requirements and derive detailed firmware More ❯

Master's or PhD preferred). Proven experience in analog and digital IC design, including physical design considerations and verification. Proficient in VHDL/Verilog and system-level modelling. Strong scripting skills (Python, MATLAB) and comfortable working in Linux-based design environments. Excellent communication and leadership skills, with the ability More ❯

testing and performance evaluation of RF systems. Experience with GnuRadio or similar SDR platforms. FPGA/RFSOC development experience and proficiency in VHDL or Verilog Familiarity with Linux environments, version control systems (e.g., GitLab), and collaborative development tools. Experience with payload development for defence or covert communications systems. PLEASE NOTE More ❯

testing and performance evaluation of RF systems. Experience with GnuRadio or similar SDR platforms. FPGA/RFSOC development experience and proficiency in VHDL or Verilog Familiarity with Linux environments, version control systems (e.g., GitLab), and collaborative development tools. Experience with payload development for defence or covert communications systems. PLEASE NOTE More ❯

and connectivity solutions Plan verification for SoC/IP subsystems, develop test infrastructure, and perform functional verification Create test benches and test cases using Verilog, SystemVerilog, UVM, C, Formal Write embedded C code or CPU-centric tests using C Define, implement, and analyze coverage Key qualifications MSc in electrical engineering More ❯

firmware designs follow established processes. Required Skills and Experience: • Experience in design techniques using VHDL. • Experience in verification techniques using either VHDL or System Verilog/UVM. • Experience in specifying timing and area constraints for efficient FPGA place and route. • Ability to analyze system-level requirements and derive detailed firmware More ❯

. Understanding of reliability and ESD concepts. Preferred Qualifications: Awareness of full custom layout techniques. Experience with Monte-Carlo simulations and analysis. Knowledge of Verilog-A for analog behavioural modelling and simulation. Experience with developing automotive products. Scripting skills (Python, TCL, Shell etc.). Personal Attributes: Strong analytical and critical More ❯

Experience of developing/modelling/simulating software in at least one of the following areas: RF telecommunications, waveforms, OSI model, SIGINT, EW VHDL VERILOG Experience with SDR architecture Agile development methodologies. C#, C, C++, Python and Database architecture. Desirable Experience XML Networked systems JICD Restful and/or RPC More ❯

Experience of developing/modelling/simulating software in at least one of the following areas: RF telecommunications, waveforms, OSI model, SIGINT, EW VHDL VERILOG Experience with SDR architecture Agile development methodologies. C#, C, C++, Python and Database architecture. Desirable Experience XML Networked systems JICD Restful and/or RPC More ❯

Experience of developing/modelling/simulating software in at least one of the following areas: RF telecommunications, waveforms, OSI model, SIGINT, EW VHDL VERILOG Experience with SDR architecture Agile development methodologies. C#, C, C++, Python and Database architecture. Desirable Experience XML Networked systems JICD Restful and/or RPC More ❯

Experience of developing/modelling/simulating software in at least one of the following areas: RF telecommunications, waveforms, OSI model, SIGINT, EW VHDL VERILOG Experience with SDR architecture Agile development methodologies. C#, C, C++, Python and Database architecture. Desirable Experience XML Networked systems JICD Restful and/or RPC More ❯

and tracking of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge More ❯

is a great time to get involved. FPGAEngineer Requirements : Degree qualified in relevant subject Cocotb experience (or willingness to learn) High Speed Digital Design Verilog VHDL Theyre looking for a modern FPGA Engineer to help them develop their high-quality work and deliver projects on time. Youll be working within More ❯

Fi products, including microcontrollers and connectivity SoC/IP subsystem verification planning, test infrastructure development, functional verification. Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal. Embedded C code or writing CPU-centric tests using C. Qualifications MSc in electrical engineering or equivalent or Bachelor with industrial More ❯

Fi products, including microcontrollers and connectivity SoC/IP subsystem verification planning, test infrastructure development, functional verification. Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal. Embedded C code or writing CPU-centric tests using C. Qualifications MSc in electrical engineering or equivalent or Bachelor with industrial More ❯

Fi products, including microcontrollers and connectivity SoC/IP subsystem verification planning, test infrastructure development, functional verification. Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal. Embedded C code or writing CPU-centric tests using C. Qualifications MSc in electrical engineering or equivalent or Bachelor with industrial More ❯

Define verification and test plan, run regressions, reproduce, and debug functional and performance bugs. Proficiency with EDA tools (Candence, Mentor) and design languages including Verilog and systemVerilog Understanding of synthesis, static timing analysis, and netlist verifications UVM expertise Please note: You must have full UK working rights to be considered More ❯

Define verification and test plan, run regressions, reproduce, and debug functional and performance bugs. Proficiency with EDA tools (Candence, Mentor) and design languages including Verilog and systemVerilog Understanding of synthesis, static timing analysis, and netlist verifications UVM expertise Please note: You must have full UK working rights to be considered More ❯

Define verification and test plan, run regressions, reproduce, and debug functional and performance bugs. Proficiency with EDA tools (Candence, Mentor) and design languages including Verilog and systemVerilog Understanding of synthesis, static timing analysis, and netlist verifications UVM expertise Please note: You must have full UK working rights to be considered More ❯

in block- and system-level IC design and verification, including technical leadership on successful design cycles. Proficiency in system-level modelling languages (e.g., VHDL, Verilog) Proficiency in scripting. As a top company, you can expect: Pension scheme, bonus structure, private healthcare. Flexible working arrangements (e.g., hybrid or remote work). More ❯