Design Verification Engineer
Greater Bristol Area, United Kingdom
IC Resources
issues Experience of the verification process applied in CPU and/or ASIC environments System Verilog, Python, C++, Linux UVM SVA LLVM, GCC SGE or other DRMS XML and XPath/XSLT Benefits In addition to a competitive salary, you can expect flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension More ❯
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