11 of 11 Permanent Synopsys Jobs in the UK excluding London

Engineering, or related field.10+ years of experience in digital and/or mixed-signal design verification. Strong proficiency in SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium).Solid understanding of digital design fundamentals, RTL design, and ASIC development flows. Experience with scripting languages (Python, Perl, Tcl) for automation. Familiarity ...

Engineering, or similar field At least ten years' of experience in analog/mixed-signal verification Proficiency in Virtuoso, SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium) A solid understanding of mixed-signal designs Experience with scripting languages (Python, Perl, Tcl) for automation Excellent language skills in English ...

1149.1IJTAG/IEEE 1687DFT verification and debugExperience developing reusable DFT methodologies or automation rather than project-specific solutions. Experience evaluating and deploying Siemens Tessent, Synopsys and/or Cadence DFT solutions. Strong scripting skills (Perl, Tcl and/or Python) together with Linux/Unix expertise. Excellent problem-solving ...

routeClock tree synthesis (CTS)Parasitic extractionStatic timing analysis (STA) and timing closureProven experience using industry-standard Electronic Design Automation (EDA) tools (e.g., Cadence, Synopsys, Siemens EDA)Ability to apply advanced engineering principles to solve complex technical problemsStrong written and verbal communication skillsAbility to work independently and collaboratively within multidisciplinary engineering ...

with performance modelling, simulation and architectural trade-off analysis using Python, C++ or similar languages. Experience with industry-standard semiconductor tool flows such as Synopsys, Cadence or Siemens EDA tools. Solid understanding of timing, power and area optimisation at the architectural level. Experience defining hardware/software interfaces and collaborating ...

other complex processor architectures. Familiarity with verification methodologies including System Verilog, UVM or formal verification. Experience with industry-standard EDA tools (e.g. Cadence or Synopsys).Knowledge of requirements management tools such as Jama, DRM or similar. Exposure to both hardware and software functional safety development. Experience supporting external or internal ...

understanding of timing closure methodologies and sign-off flows for advanced ASIC and SoC designs Strong knowledge of industry-standard EDA tools such as Synopsys PrimeTime, Design Compiler and place-and-route tools Experience working on complex, high-performance semiconductor products, ideally within AI, HPC or data centre applications Strong ...

MBIST/LBIST implementation JTAG/IEEE 1149.1 standards Test coverage analysis and diagnosis. Experience with industry-standard EDA tools such as: Siemens Tessent Synopsys TetraMAX/TestMAX Strong scripting skills in Tcl & PythonFamiliarity with Verilog/SystemVerilog and simulation environments Excellent debugging and problem-solving skillsGood communication and excellent ...

Physical Design position. Wide experience with industry standard EDA tools for digital implementation and signoff, and the ideal candidate should be familiar with: Synopsys Design Compiler and PrimetimeCadence Innovus, Voltus and ConformalHands-on working knowledge of deep sub-micron ASIC implementation and expertise in areas such as: RTL synthesisTiming constraint ...

related fieldSeveral years' experience in device engineering and TCAD‐based technology developmentStrong understanding of semiconductor device physicsDeep expertise with TCAD tools (e.g. Synopsys Sentaurus)Experience with Power MOSFET device concepts, ideally trench‐basedAbility to analyse performance, reliability and manufacturability trade‐offsStrong analytical and problem‐solving mindsetClear, structured technical communication skillsAbility ...

KnowledgeStrong understanding of semiconductor engineering workflows and their infrastructure dependenciesFamiliarity with: RTL-to-GDSII flowsVerification regressionsSimulation farmsSynthesis and place-and-route infrastructureEDA license managementCadence, Synopsys, and Mentor environmentsTapeout-critical infrastructure reliabilityClear understanding of: The impact of downtime on tapeout schedulesThe importance of deterministic engineering environmentsReproducibility requirementsCommon performance bottlenecks ...