16 of 16 Permanent Synopsys Jobs in the UK excluding London

Computer Engineering, or related field.10+ years of experience in digital and/or mixed-signal design verification.Strong proficiency in SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium).Solid understanding of digital design fundamentals, RTL design, and ASIC development flows.Experience with scripting languages (Python, Perl, Tcl) for automation.Familiarity with formal ...

routeClock tree synthesis (CTS)Parasitic extractionStatic timing analysis (STA) and timing closureProven experience using industry-standard Electronic Design Automation (EDA) tools (e.g., Cadence, Synopsys, Siemens EDA)Ability to apply advanced engineering principles to solve complex technical problemsStrong written and verbal communication skillsAbility to work independently and collaboratively within multidisciplinary engineering ...

Engineering, or similar field At least ten years’ of experience in analog/mixed-signal verification Proficiency in Virtuoso, SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium) A solid understanding of mixed-signal designs Experience with scripting languages (Python, Perl, Tcl) for automation Excellent language skills in English ...

Engineering, or similar field At least ten years’ of experience in analog/mixed-signal verification Proficiency in Virtuoso, SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium) A solid understanding of mixed-signal designs Experience with scripting languages (Python, Perl, Tcl) for automation Excellent language skills in English ...

simulation using Python and/or MATLAB/Simulink, with practical experience in code coverage, functional coverage, and industry-standard verification tools such as Synopsys, Cadence, and ModelSim. Familiarity with Xilinx Ultrascale+ MPSoC devices and common peripheral interfaces including SPI, I2C, UART, and USB is also essential. You will also ...

IEEE 1149.1IJTAG/IEEE 1687DFT verification and debugExperience developing reusable DFT methodologies or automation rather than project-specific solutions.Experience evaluating and deploying Siemens Tessent, Synopsys and/or Cadence DFT solutions.Strong scripting skills (Perl, Tcl and/or Python) together with Linux/Unix expertise.Excellent problem-solving and analytical skills.Strong ...

communication skills (written, verbal, and presentation) and excellent time management. Proficiency with industry‐standard EDA tools for Physical Design and Signoff flows, such as: Synopsys FusionCompiler, PrimeTime, StarRC Cadence Innovus Mentor Graphics Calibre Apache Redhawk Demonstrated experience leading technical teams through complex design cycles. Background in high‐speed microprocessor designs. ...

verification tools Track record of multiple products in volume production Experience with design for testability, scan insertion, scan pattern debugging Familiarity with Cadence and Synopsys design tools Experience debugging ICs and associated evaluation systems in a lab environment Excellent communication skills, ability to work within a cross functional team ...

Physical Design position.Wide experience with industry standard EDA tools for digital implementation and signoff, and the ideal candidate should be familiar with: Synopsys Design Compiler and PrimetimeCadence Innovus, Voltus and ConformalHands-on working knowledge of deep sub-micron ASIC implementation and expertise in areas such as: RTL synthesisTiming constraint debug ...

MBIST/LBIST implementation JTAG/IEEE 1149.1 standards Test coverage analysis and diagnosis. Experience with industry-standard EDA tools such as: Siemens Tessent Synopsys TetraMAX/TestMAX Strong scripting skills in Tcl & PythonFamiliarity with Verilog/SystemVerilog and simulation environments Excellent debugging and problem-solving skillsGood communication and excellent ...

detail.Strong communication skills (written, verbal, and presentation) and excellent time management.Proficiency with industry-standard EDA tools for Physical Design and Signoff flows, such as: Synopsys FusionCompiler, PrimeTime, StarRCCadence InnovusMentor Graphics CalibreApache RedhawkDemonstrated experience leading technical teams through complex design cycles.Background in high-speed microprocessor designs.Familiarity with current sub-micron technologies.Solid ...

understanding of timing closure methodologies and sign-off flows for advanced ASIC and SoC designs Strong knowledge of industry-standard EDA tools such as Synopsys PrimeTime, Design Compiler and place-and-route tools Experience working on complex, high-performance semiconductor products, ideally within AI, HPC or data centre applications Strong ...

other complex processor architectures.Familiarity with verification methodologies including System Verilog, UVM or formal verification.Experience with industry-standard EDA tools (e.g. Cadence or Synopsys).Knowledge of requirements management tools such as Jama, DRM or similar.Exposure to both hardware and software functional safety development.Experience supporting external or internal safety assessments and audits.Why ...

have an excellent understanding of digital physical implementation and advanced CMOS technologies. You are a proficient user of EDA tools (Cadence and/or Synopsys). You understand advanced semiconductor fabrication processes and devices. You are detail-oriented but are also comfortable in critical thinking and making decisions to navigate ...

related fieldSeveral years’ experience in device engineering and TCAD‐based technology developmentStrong understanding of semiconductor device physicsDeep expertise with TCAD tools (e.g. Synopsys Sentaurus)Experience with Power MOSFET device concepts, ideally trench‐basedAbility to analyse performance, reliability and manufacturability trade‐offsStrong analytical and problem‐solving mindsetClear, structured technical communication skillsAbility ...

KnowledgeStrong understanding of semiconductor engineering workflows and their infrastructure dependenciesFamiliarity with:RTL-to-GDSII flowsVerification regressionsSimulation farmsSynthesis and place-and-route infrastructureEDA license managementCadence, Synopsys, and Mentor environmentsTapeout-critical infrastructure reliabilityClear understanding of:The impact of downtime on tapeout schedulesThe importance of deterministic engineering environmentsReproducibility requirementsCommon performance bottlenecks ...