1 to 25 of 56 Permanent SystemVerilog Jobs in the UK excluding London

including integration with high-speed ADCs/DACs. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Implement designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop C/C++ software for deployment to embedded systems Use industry-standard tools such as Vivado, Quartus ...

system architecture and documentation. Skills & Experience Field Programmable Gate Arrays and digital signal processing Proven experience in FPGA design (VHDL/Verilog/SystemVerilog). Strong background in DSP implementation and digital transceiver design. Solid understanding of digital and RF hardware principles. Familiarity with AXI bus architectures and software-controlled ...

software. Collaborate with multidisciplinary teams to deliver next-generation quantum technologies. What Were Looking For: Strong experience in FPGA programming (VHDL/Verilog/SystemVerilog) and DSP implementation. Knowledge of digital and RF hardware, with hands-on experience in embedded systems. Experience with standard hardware interfaces (I2C, SPI, UART ...

microarchitecture, collaborating with design, verification, and validation teams to deliver high-performance, power-efficient hardware. Key responsibilities Define microarchitecture specs and implement RTL (SystemVerilog) at IP/SoC level Analyse and optimise circuits for performance, power, and area Debug designs, support reviews, and improve design environments Mentor junior engineers ...

infrastructure Contribute to internal tools and open-source verification projects Key requirements: 3+ years' experience in FPGA or ASIC functional verification Strong SystemVerilog skills (UVM or similar frameworks) Experience with functional and code coverage Proficiency in Python; C++ a plus Comfortable working in a Linux environment Familiarity with Verilator ...

Physics or similar A-Levels in Mathematics, Physics or similar graded A* - B Proficiency in C, C++, Python Desired: experience with HDLs such as SystemVerilog or VHDL If you are an PhD graduate looking for an exciting Software Engineer opportunity to work at the intersection of software, hardware, and research ...

Design Engineer? Developing complex FPGA architectures and design implementations using VHDL, Simulink, targeting Xilinx, Intel, and Microsemi devices. Verifying FPGA implementations using VHDL and SystemVerilog/UVM test-bench methodologies. Utilizing FPGA design toolsets and Mentor verification tools such as QuestaSim and ModelSim. Writing low-level software … Design Engineer? Degree-qualified (or equivalent) with significant experience in FPGA development. Strong VHDL language and design skills. Proven verification skills using VHDL and SystemVerilog methodologies. Demonstrable experience designing for Xilinx, Intel, or Microsemi FPGAs. Experience in professionally configuring and documenting designs. Experience working in large, multidiscipline teams. My client ...

Job Title: FPGA Engineer Location: Bristol – Hybrid 3+ days on-site per week Role Type: Permanent Salary: £50,000 - £85,000 per annum, depending on experience Our client, an established engineering consultancy, require an experienced ...

Job Title: FPGA Engineer Location: Edinburgh – Hybrid 3+ days on-site per week Role Type: Permanent Salary: £50,000 - £85,000 per annum, depending on experience Our client, an established engineering consultancy, require an experienced ...

Job Title: FPGA Engineer Location: Luton – Hybrid 3+ days on-site per week Role Type: Contract Duration : 12 months Rate: £60.00 - £80.00 per hour – Inside IR35 Our client, an established engineering consultancy, require an experienced ...

automation - beyond simple scripts. At least two years of professional RTL functional verification experience for FPGA or ASIC designs. Hands-on expertise in SystemVerilog and UVM, including stimulus development and code/functional coverage collection and analysis. Experience with cocotb desirable. Apply below for more information ...

closely related field Minimum of 4 years of relevant industry experience Special Requirements Universal Verification Methodology TCL and Bash scripting Formal verification techniques SystemVerilog Salary and benefits £50,000 – £60,000 per annum base salary, dependent on experience and skill set Bonus and/or equity participation available Industry-standard ...

/DACs. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Lead or contribute to the implementation of designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop C/C++ software for deployment to embedded systems Use industry-standard tools such as Vivado, Quartus … signal generators and logic analysers) Desirable Experience Experience working with embedded Linux, bare-metal C drivers, or FPGA-based system integration Proficiency in VHDL, SystemVerilog, and embedded C for FPGA-host integration, control, and testing Familiarity with AXI interfaces, memory interfaces, JESD204B/C, or high-speed ADC/ ...

Waveform viewers, and Formal Proof Tools. Familiarity with Formal Verification, Assertions, and Silicon bring-up. Keywords: CPU Verification/Design Verification/DV/SystemVerilog/UVM/Cache Coherence/Branch Prediction/Formal Verification/RIS/SOC/Assembly/Cambridge/Silicon Bring ...

Stevenage Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at ...

Bristol Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at ...

Senior FPGA Engineer 13412 This position is perfect for an FPGA Engineer focused on innovation. You will be ahead of industry trends, collaborating with leading semiconductor companies and top engineers on challenging projects. In this ...

edge sign-off methodologies. Key requirements: Mastery of industry-standard formal tools (e.g., JasperGold, VC Formal, or Questa Formal). Hands-on expertise writing SystemVerilog Assertions. PExperience in deep bug-hunting, coverage closure, and achieving formal sign-off on complex IPs. Knowledge of GPU architectures or sequential equivalence checking ...

edge sign-off methodologies. Key requirements: Mastery of industry-standard formal tools (e.g., JasperGold, VC Formal, or Questa Formal). Hands-on expertise writing SystemVerilog Assertions. PExperience in deep bug-hunting, coverage closure, and achieving formal sign-off on complex IPs. Knowledge of GPU architectures or sequential equivalence checking ...

Role Overview: Youll play a crucial role in designing, debugging, and optimising complex hardware modules to achieve superior performance, efficiency, and reliability. You must be a British Citizen. There is no visa sponsorship available for ...

sensor fusion, essential for the performance of PNT solutions. As a key member of the team, you will work with HDL (VHDL, Verilog, SystemVerilog) to develop optimised digital designs and ensure the functionality and reliability of these solutions through rigorous verification processes. About Us TUALCOM specialises in the design … leveraging Kalman filters for sensor fusion. Performing hardware-level verification and validation of FPGA designs to ensure functionality and reliability. Utilising HDL (VHDL, Verilog, SystemVerilog) for FPGA design and work with industry-leading simulation tools such as Vivado, ModelSim, and QuestaSim. Collaborating with cross-functional teams to integrate communication protocols ...

/Computer Science or other related discipline. Metric driven verification – verification planning, requirements extraction – directed and constrained random verification – functional and code coverage analysis SystemVerilog – SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience ...

/Computer Science or other related discipline. Metric driven verification – verification planning, requirements extraction – directed and constrained random verification – functional and code coverage analysis SystemVerilog – SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience ...

Design Verification Engineer This is a superb opportunity to join one of the hottest names in the industry! A chance to build a technology that transforms the future of humanity. A chance to work on ...

exciting opportunity for a Senior Staff Verification Engineer to join a global R&D organisation. In this role, you will be responsible for developing SystemVerilog UVM testbench environments for IP-level verification, as well as designing and implementing new UVM verification components. You will ensure that verification environments meet … verification strategy and testbench architecture across the business. Key Requirements Minimum of 7 years' experience in hardware verification, ideally at IP level, using SystemVerilog and UVM Advanced expertise in UVM, SystemVerilog, and SystemVerilog Assertions (SVAs) Experience developing verification platforms and frameworks Proven ownership of IP verification, including delivery against defined ...