17 of 17 Permanent Tcl Jobs in the UK excluding London

design through to verification Experience with Xilinx Zynq or similar SoC platforms Understanding of timing closure and high-speed digital design Desirable Python or Tcl scripting MATLAB High-Level Synthesis (HLS) Video interfaces (MIPI, SDI) C++ Functional Safety (IEC 61508/ISO 26262) Defence, aerospace or other safety-critical industries ...

Proficiency with Cadence tool suite, such as Xcelium/IMC/Virtuoso etc. Verification planning tools (ePlanner/vManager) and scripting languages (Shell/TCL/Perl/Python). An understanding of FPGA prototyping/tools, and supporting development of necessary scripting and pre-silicon validation. Experience with multiple ...

Verilog or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. Prior technical and/or team leadership skills required for more senior positions. Desirable skills and experience Knowledge of advanced ...

Verilog or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. Prior technical and/or team leadership skills required for more senior positions. Desirable skills and experience Knowledge of advanced ...

experience Knowledge of FPGA toolchains (Vivado, Quartus, ModelSim) Experience with SoC devices (e.g. Zynq UltraScale+) Desirable: Video/RF protocols (MIPI, SDI) Python or TCL scripting High-reliability, defence, or aerospace experience UK Security Clearance (SC or DV) This FPGA Engineer job offers the chance to develop in a very ...

experience Knowledge of FPGA toolchains (Vivado, Quartus, ModelSim) Experience with SoC devices (e.g. Zynq UltraScale+) Desirable: Video/RF protocols (MIPI, SDI) Python or TCL scripting High-reliability, defence, or aerospace experience UK Security Clearance (SC or DV) This FPGA Engineer job offers the chance to develop in a very ...

Formal). Experience of design best practices and HW/FW interfaces. Strong working knowledge of digital design and SoC architecture. Scripting in Perl, TCL or Python. Gate‐Level Simulation and Debug — 0‐delay, timing annotated. Experience in Low power aware Verification. Debugging regression failures and tracking to closure through ...

VHDL and familiarity with modern digital design flows. Strong ability to diagnose and resolve complex design issues, including via scripting/programming (Python, Tcl, etc.). Demonstrated excellence in cross functional leadership and communication across global teams. Strong organisational skills with ability to manage multiple priorities and drive execution ...

clock power optimization. Familiarity with multi‐corner multi‐mode timing closure and variation‐aware implementation methodologies. Experience developing automation or analysis flows using TCL, Python, Perl, or similar scripting languages. For Staff‐level candidates, demonstrated ability to lead technical initiatives, influence cross‐functional teams, define methodology, and mentor other engineers. ...

verification concepts: memory caches, DMA, security architecture (TrustZone or equivalent). Experience with Cadence simulation tool flow including gate-level simulation. Scripting languages: Bash, TCL, Make, YAML, etc. Logistics Please note that this role is based in Cambridge and requires full-time onsite attendance. Compensation and Benefits This opportunity offers ...

automation Good understanding of ARM Cortex-M series processors and CPU architecture Some PCB electronics design experiences Familiarity with Linux, Git, Bash, and Tcl Compensation: Private health insurance Life insurance 33 days holiday Expert training from renowned industry veterans Apply now to join a company truly leading their niche ...

flow development Experience with all aspects of ASIC physical design including floorplanning, power‐distribution, multi‐voltage design, placement, CTS, and routing. Strong TCL/Python scripting skills and LLM/GenAI implementation methods; experience developing complex algorithms, managing and regressing P&R flows. Familiarity with design signoff issues. EEO Statement ...

validate design intent Knowledge of CPU, DSP, or FPU architectures, including debug and test strategies Proficiency in C, SystemC, C++, Python, Perl, or TCL Understanding of verification requirements derived from architectural and functional specifications Experience with GPU or CPU design methodologies, including UVM On offer is a competitive base salary ...

RedHawk, Conformal). Ability to debug complex physical design issues across timing, congestion, clocking, routing, power, and verification domains. Scripting and automation experience using TCL, Python, or Perl. Strong communication skills and the ability to work effectively in a global, cross‐functional engineering environment. Minimum Qualifications Bachelor’s degree ...

Virtuoso, SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium) A solid understanding of mixed-signal designs Experience with scripting languages (Python, Perl, Tcl) for automation Excellent language skills in English On offer is a competitive salary, annual bonus, stock units plus visa sponsorship and relocation assistance. For more details ...

methodologies (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints Familiarity with scripting languages such as Bash, Python, or Tcl This role is based in Cambridge and requires full-time onsite attendance. The opportunity offers a competitive compensation package and a range of non-monetary ...

validation Radiation effects and mitigation techniques DC/DC power supply design Environmental, thermal and EMI/EMC standards Scripting languages such as Python, Tcl or Perl Previous experience leading engineering teams or line management What's on Offer Work on innovative space and satellite technologies with real-world impact. ...