9 of 9 Permanent Code Coverage Jobs

application development using Apex, Lightning Web Components (LWC), Visualforce, and SOQL, as well as the implementation of complex business logic through a combination of code and Salesforce Flow.Highly skilled in enterprise systems integration, designing and maintaining REST and SOAP APIs, middleware-based integrations, ETL processes, and AppExchange solutions … Agile delivery, with hands-on experience deploying solutions via CI/CD pipelines using Azure DevOps, managing sandbox environments, and supporting infrastructure as code (IaC) and test-driven development (TDD) practices. Adept at collaborating with cross-functional teams-including business stakeholders, architects, QA, and external vendors-to translate complex ...

engineers to ensure software and hardware compatibility Embedded Linux software development, processes and documentation is a plus Must have You must be able to code in C to a high standard Beneficial to have: Experience with software feature design Experience with software development in C/C++ including unit … test, performance analysis, code coverage, static analysis (For Senior positions) Experience mentoring other software developers Experience using GNU/LLVM tools on embedded platforms using stop-mode debug tools such as JTAG/SWD Experience working with BSP development including device driver development, board-bring-up, RTOS ...

year this team has worked on: Big iron - ExaLogic, ExaData, UltraSPARC, InfiniBand Firmware reverse engineering of various hardware components Developing custom fuzzing platforms for code-coverage analysis Several different hypervisors Linux and Windows kernel mode non-sense The list goes on and on! This role … hands-on cloud hacker on the Offensive Security Team. Responsibilities You enjoy diving into complex source code audits to reveal subtle security vulnerabilities Writing new tools such as fuzzers in languages such as C/C++, Python, Ruby, Go or Java, Tearing apart an undocumented file format or network ...

assurance standards (e.g., ECSS-Q-ST-10C, DO-178B, AS9115) Proficiency in using static analysis tools (e.g., CPPCheck, Lint, SonarQube, Helix QAC) Experience with code coverage tools (e.g., GCOV, LCOV, LDRA, Vector Cast) Integration with CI/CD pipelines (e.g., Git, Jenkins) Strong knowledge of Linux operating systems ...

assigned projects Review internal and customer specifications and develop comprehensive verification plans, test plans, and environments to ensure full compliance Review and analyse RTL code to debug issues, gain design understanding, and propose effective solutions Work closely with digital and analog design teams to identify, debug, and resolve … gate-level simulation issues Develop assertion-based, constrained-random verification environments Create and maintain testcase plans, coverage plans, and verification plans Implement and analyse functional and code coverage to ensure verification completeness Minimum requirements MEng degree in Electrical and Electronic Engineering or a closely related field Minimum ...

equivalent in Electronics/Computer Science or other related discipline. Metric driven verification – verification planning, requirements extraction – directed and constrained random verification – functional and code coverage analysis SystemVerilog – SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate ...

equivalent in Electronics/Computer Science or other related discipline. Metric driven verification – verification planning, requirements extraction – directed and constrained random verification – functional and code coverage analysis SystemVerilog – SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate ...

equivalent in Electronics/Computer Science or other related discipline. Metric driven verification – verification planning, requirements extraction – directed and constrained random verification – functional and code coverage analysis SystemVerilog – SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate ...

implement robust, reusable verification environments using SystemVerilog and UVM. Create and execute constrained-random and directed tests to achieve high levels of functional and code coverage. Analyse simulation results, debug complex failures, and work closely with RTL design teams to root-cause and resolve issues. Develop and maintain Python ...