Design Verification Engineer
- Hiring Organisation
- IC Resources
- Location
- Cambridge, England, United Kingdom
verification process applied in CPU and/or ASIC environments System Verilog, Python, C++, Linux UVM SVA LLVM, GCC SGE or other DRMS XML and XPath/XSLT Benefits In addition to a competitive salary, you can expect flexible working, a generous annual leave policy, private medical insurance and health ...