4 of 4 Remote/Hybrid Memory Management Jobs in Cambridgeshire

similar technology is also important. A good understanding of how AI models execute in practice is essential, including graph processing, operator execution, memory management, and backend integration. This role involves analysing, investigating, diagnosing, and resolving complex functional or performance issues across frameworks, runtimes, compilers, drivers, and hardware abstraction … kernels Designing or implementing Ahead-of-Time or Just-in-Time compilation flows for AI workloads Transforming graphs or working with operator partitioning, scheduling, memory planning, or model optimisation Validating, benchmarking, profiling, or analysing AI model performance Developing compiler technologies, intermediate representations, or hardware abstraction layers Building automated tests ...

programming or compute technologies such as Vulkan, OpenCL, TOSA, or compute kernels Machine learning runtimes, compilers, drivers, or backend integration Computational graphs, operators, memory management, or model optimisation Ahead-of-Time or Just-in-Time compilation Benchmarking, profiling, testing, or analysing software performance Automated testing or CI/ ...

interaction design and developer workflows. Knowledge of Arm architectures. Strong understanding of neural-network execution and inference runtimes, including computational graphs, operators, memory management, backend partitioning and execution across heterogeneous hardware. Experience with hardware-aware model optimisation and performance analysis, including quantisation, graph optimisation, operator fusion, precision reduction … profiling and debugging across latency, memory, model size and accuracy. Experience across ML frameworks, model formats and deployment tooling, such as PyTorch, ONNX/ONNX Runtime, ExecuTorch, TensorFlow/LiteRT and OpenVINO, including model inspection, visualisation and benchmarking across CPUs, GPUs and ML accelerators. In Return: Our team offers ...

work closely with other teams on the design microarchitecture, verification methodologies, system performance, etc. You will balance other opportunities such as working with Project Management on activities, plans, and schedule as well as guide and support junior members of the team. Required Skills and Experience: In addition to bringing … need: Solid understanding of digital hardware design and Verilog HDL. Experience in PCIe, CXL and IDE Feature Verification and Performance Analysis. Knowledge of System Memory Management Unit and Generic Interrupt Controller Integration with PCIe. Experience on working with PCIe & CXL IPs and Emulation friendly Transactors. Experience on simulation ...