6 of 6 Remote Cadence Jobs in the East of England

Methodology) and coverage-driven verification Skilled in analyzing waveforms, simulation outputs, and debugging complex digital behaviors Synthesis, Implementation & File Generation Proficient in synthesis and implementation using: Synopsys Design Compiler Cadence Genus Xilinx Vivado Intel Quartus Prime Experienced in generating and managing key implementation deliverables: .lib files for timing and cell characterization .lef files for physical abstraction of standard cells … Pattern Generation (ATPG) and analyzing test coverage reports Understanding of DFT constraints and impact on design timing and area Tools & Workflow Automation Experienced with industry-standard EDA tools : Synopsys, Cadence, Siemens/Mentor, Xilinx, Intel Proficient in version control systems such as Git for collaborative development Skilled in scripting and workflow automation using Python , TCL , Make , and Shell scripting More ❯

with cross-functional teams to enable system bring-up, debug, and feature validation on emulation platforms. Support compilation, deployment, and debug flows for emulation systems such as Synopsys ZeBu, Cadence Palladium, and Siemens Strato. Solve simulation/emulation mismatches and system-level test failures. Work closely with EDA vendors to deploy new capabilities, resolve tool issues, and influence future More ❯

methodologies to improve GPU power, performance and area (PPA). Required Skills and Experience : Experience with hardware description languages (System Verilog preferable). Experience using EDA simulators (Siemens, Synopsys, Cadence) Strong problem solving and debugging skills, and ability to closely collaborate with other teams. Experience working with version control and code review systems such as Git and Gerrit Proficiency More ❯

with EDA vendors to solve tool issues and advance PPA. Planning and scheduling of own work inline with the project goals and needs. What you'll need to succeed Cadence: Genus, Innovus, Tempus, QRC & Conformal PnR Flow: Synthesis, LEC, CLP, Floorplan, Placement, CTS, PostCTS, Routing, STA Synopsys: Fusion compiler, Formality Synthesis, LEC Low power design techniques (power gating, DVFS More ❯

for driving cross-functional execution, resolving roadblocks, and keeping our delivery milestones on track. The engineering team is functionally managed by disciplined leads, while you own project planning, execution cadence, and alignment with our business goals. Reporting Line: This role will initially report to the CEO. However, as Forefront RF grows and evolves its senior leadership, a Chief Operating More ❯

and external teams, facilitating communication between IC and module design functions. Bachelor's or master's degree in electrical engineering, microelectronics, or something similar. Extensive hands-on experience with Cadence design tools; familiarity with ADS Momentum/RF Pro and Mentor Graphics DRC/LVA/PEX is a plus. Deep expertise in RF IC design using various silicon More ❯