51 to 59 of 59 Validation Jobs in Edinburgh

Were looking for a technically strong Senior Systems Engineer who can work across the full engineering lifecycle, with particular focus on requirements, integration, verification, validation and qualification. This role suits someone who is hands-on, confident engaging with stakeholders, and comfortable working across hardware, software and firmware in a complex … customer-facing programmes where quality, rigour and delivery matter. Key Responsibilities Work on the right-hand side of the V lifecycle, supporting integration, verification, validation and qualification activities. Capture, manage and mature requirements. Develop test documentation, test plans and test specifications. Execute integration and validation tests. Create and maintain VVRM ...

robust analysis and structured trade studies. What you'll do Deliver EO modelling tasks to support system concept development, requirements definition and design validation Conduct sensitivity analyses and trade studies to evaluate design options and inform system parameters, such as aperture size. Generate robust technical evidence to support requirements development … verification and validation activities. Ensure modelling activities are configured, documented and managed. Translate system requirements into modelling approaches and use modelling outputs to inform design decisions and requirements evolution. Present technical recommendations, progress updates and risks clearly and effectively to stakeholders. Collaborate with multidisciplinary engineering teams to develop coherent ...

/UVM verification, Object-Oriented and Randomized Verification, as well as Gate Level SimulationTop-level metric-driven analog mixed-signal (AMS) simulationsModelling and validation of analog blocks (RNM, Verilog-AMS)Proficiency with Cadence tool suite, such as Xcelium/IMC/Virtuoso etc. Verification planning tools (ePlanner/vManager … teamRoleContribute to the pre-silicon verification of impactful, innovative mixed-signal products, working with a team of verification and design engineersBridge the verification and validation environments, supporting post-silicon validation. Execute for 100% verification coverage, combining DMS and AMS, top-level, IP-level, and Formal Analysis. Establish and continuously improve ...

verification, Object-Oriented and Randomized Verification, as well as Gate Level Simulation. Top-level metric-driven analog mixed-signal (AMS) simulations. Modelling and validation of analog blocks (RNM, Verilog-AMS). Proficiency with Cadence tool suite, such as Xcelium/IMC/Virtuoso etc. Verification planning tools (ePlanner/vManager … silicon verification of impactful, innovative mixed-signal products, working with a team of verification and design engineers. Bridge the verification and validation environments, supporting post-silicon validation. Execute for 100% verification coverage, combining DMS and AMS, top-level, IP-level, and Formal Analysis. Establish and continuously improve verification flows, methodologies ...

sales and pre-sales teams. Build SKILL-based utilities to address specific customer requirements not covered by standard Virtuoso functionality, including defining and executing validation plans before customer delivery. Use the Virtuoso platform to create test schematics and layouts, validate newly implemented features, and provide structured feedback … customer-driven R&D priorities, working within cross-functional teams (CFTs) to achieve alignment across engineering, product, and commercial stakeholders. Partner with the Product Validation (PV) team to ensure rigorous validation of customer flows, contributing flow tests for regression testing and quality assurance. Collaborate with Technical Publications to ensure documentation ...

Ready to work on the next generation of power management technology? A leading UK semiconductor company is expanding its Edinburgh team and is looking for a Senior Analog IC Design Engineer with strong power conversion ...

modes and power domains to meet aggressive energy targetsLead and drive internal NVM design reviews, ensuring quality, robustness, and technical excellencePartner with test and validation teams to develop comprehensive validation and silicon characterization strategies for NVM macrosCollaborate cross-functionally with design, silicon technology, and marketing teams to shape optimized, product ...

security, and schedule. Engage in design, verification, and implementation reviews to ensure architectural integrity. Support silicon bring‐up and debug through close collaboration with validation and software teams. QualificationsEducation: BEng in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Experience: Demonstrated capability delivering high‐quality architectural specifications. Strong … plus. Prior experience working on RF, communications or signal‐processing ASICs. Soft Skills: Ability to work collaboratively across hardware, software, verification, product, systems, validation, and software teams. Ability to work closely with internal teams and external partners. Technology Stack: Python scripting or programming MATLABPhysical Requirements Ability to work ...

maximum accuracy within the hardware constraints that define your actual platform. Real-World Iteration. You will take models from lab development through semi-field validation and into live deployment. You will see what happens when your model encounters conditions it has never seen before. You will debug why a model … will own the complete pipeline: from sensor data ingestion and cleaning, through feature engineering and model development, through embedded optimisation and deployment, through field validation and iteration. Key Responsibilities Clean, structure, and analyse sensor datasets from real-world deployments for training and evaluation Develop machine learning models optimised for embedded ...