1 to 25 of 34 Remote/Hybrid PCIe Jobs in England

Verilog, System Verilog and UVM* FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel).* Fast interfaces such as PCIe, Ethernet, and JESD is also required.* Auto-generated code using model driven engineering using Matlab and Simulink tools* Derivation of detailed FPGA/Firmware requirements ...

Verilog, System Verilog and UVM* FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel).* Fast interfaces such as PCIe, Ethernet, and JESD is also required.* Auto-generated code using model driven engineering using Matlab and Simulink tools* Derivation of detailed FPGA/Firmware requirements ...

VHDL, Xilinx, TCL, Verilog, System Verilog and UVMFPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel).Fast interfaces such as PCIe, Ethernet, and JESD is also required.Auto-generated code using model driven engineering using Matlab and Simulink toolsDerivation of detailed FPGA/Firmware requirements and architecture ...

Xilinx,TCL,Verilog,System Verilogand UVM FPGAarchitectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto-generated code usingmodel driven engineeringusingMatlabandSimulinktools Derivation of detailedFPGA/Firmwarerequirements and architecture fromsystem requirements A structured approach toFPGA/ ...

teams Eligibility to obtain UK Security Clearance Nice to have: Experience in defence, aerospace, or other safety-critical industries Knowledge of protocols such as PCIe, Ethernet, AXI Experience with verification methodologies (e.g. OSVVM, UVVM) Familiarity with tools such as MATLAB, DOORS, or Linux environments Experience mentoring junior engineers or leading ...

from scratch where vendor IP is unsuitable, introduces latency or creates bottlenecks Architect and integrate high-speed data acquisition pipelines utilising ultra-fast ADCs, PCIe, high-speed Ethernet and transceiver technologies Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions Develop ...

verification.Expertise in several of the following:Use of application processors, FPGAs and SoCs for data throughput and power consumption.Embedded interconnects such as DDR4, QSPI, PCIe, JESD204.ECAD tools (ideally Altium Designer) for PCB layout.C and Python on Linux (ideally embedded programming).Verilog/VHDL.DSP applied to RF.Any additional past consultancy project ...

VHDL including implementation of algorithms. Verilog experience an advantage. * Experience in compilation timing closure is essential. * Working knowledge of interface standards such as LVDS, PCIE, GMII etc * Skilled in testbench generation and verification on new design features * Competent with Version Control System tools, like Git, SVN, etc * A knowledge ...

join the team. For this position, you will bring expertise in verifying and testing complex IP such as Crypto Accelerators, HW DVFS components, PCIe controllers, and interconnect fabrics. You will guarantee all these products function well with each other and with the software to enable our partners to develop outstanding ...

join the team. For this position, you will bring expertise in verifying and testing complex IP such as Crypto Accelerators, HW DVFS components, PCIe controllers, and interconnect fabrics. You will guarantee all these products function well with each other and with the software to enable our partners to develop outstanding ...

analysis Leadership or mentoring experience within technical engineering environments Familiarity with semiconductor design processes and processor card manufacturing Knowledge of industry standards such as PCIe, DDR, and other relevant specifications Experience with power management, thermal analysis, and signal integrity considerations Background in systems architecture and platform-level design Understanding ...

speed PCBs, including schematic capture, layout oversight and simulation. Experience with: FPGA, SoC or microprocessor‐based designs High‐speed serial links and protocols (e.g. PCIe, Ethernet, JESD‐class interfaces) Practical expertise in hardware bring‐up, debug, test and verification. Ability to interpret and derive hardware designs from system‐level requirements. ...

teams Leadership or mentoring experience within technical engineering environments Familiarity with semiconductor design processes and processor card manufacturing Knowledge of industry standards such as PCIe, DDR, and other relevant specifications Experience with power management, thermal analysis, and signal integrity considerations Background in systems architecture and platform-level design Understanding ...

with IEC 62304 or equivalent software development standards Strong understanding of hardware-software integration, including FPGA or microcontroller interfaces, communication buses (SPI, I2C, UART, PCIe), and real-time operating systems Demonstrated ability to write clean, well‐tested, and maintainable code in a safety‐critical context Nice to Have Experience with ...

devices such as FPGAs/CPLDs Expertise in high-speed digital design, detailed knowledge of the latest high-speed IO interface standards (e.g. PCIe Gen 5/6/7 and LPDDR5/6 memory technologies) In-depth knowledge and experience of Signal Integrity and Power Integrity techniques from ...

protocols (e.g. AMBA ACE-Lite/AXI/AHB/APB/CHI)Familiarity with one or more of processor subsystems, Interconnects, security subsystems, PCIe subsystems, system power management flowsKnowledge of Perl, Python or other scripting languagesAdditional InformationPlease note that a relocation package (including visa sponsorship support) is available ...

protocols (e.g. AMBA ACE-Lite/AXI/AHB/APB/CHI) Familiarity with one or more of processor subsystems, Interconnects, security subsystems, PCIe subsystems, system power management flows Knowledge of Perl, Python or other scripting languages Additional Information Please note that a relocation package (including visa sponsorship support ...

rollback protection Familiarity with Arm architecture and boot processes, including early boot stages and firmware–hardware interaction Familiarity with platform interconnects such as PCIe, and associated security considerations in device and data-center environments Experience developing automation, validation tools, or scripts, including integration into CI workflows Proficiency in C/ ...

will design high‐speed multi‐layer PCBs for rugged embedded systems used in defence applications, from concept through production support. You will work on PCIe/Ethernet interfaces, participate in schematic capture, layout guidance, and signal integrity, and collaborate with firmware and mechanical teams. #J-18808-Ljbffr ...

across distributed teams. Requirements include strong electronics knowledge, embedded compute systems, high-pin-count SoCs, FPGAs/CPLDs, and expertise in high-speed interfaces (PCIe Gen5/6/7, #J-18808-Ljbffr ...

candidate will have over 8 years of experience, with strong expertise in UVM/SystemVerilog and hands-on experience with HPC protocols such as PCIe and DDR. This role involves verification of various controllers and writing new test cases, requiring strong debugging skills and the ability to work independently while ...

designing and developing embedded software for high‐speed networking platforms, integrating hardware and photonics for HPC systems. Responsibilities include architecture definition, DevOps improvements, Linux PCIe driver work, and building control/monitoring systems. Collaboration with hardware teams on prototype hardware is essential. #J-18808-Ljbffr ...

join a global leader in advanced semiconductor technologies. This role offers the chance to work on cutting-edge 5nm designs, supporting the latest PCIe interfaces, protocols, and NAND flash solutions. While part of a large international organisation, the UK site operates with the feel of a fast-moving startup … Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred) What’s on offer Competitive base salary Hybrid working model Generous company pension scheme Private health insurance Visa sponsorship and relocation support ...

Senior Design Engineer Department: Hardware Employment Type: Full Time Location: Bristol Description We are looking for multiple Senior Design Engineers who will work on revolutionary technology that is at the leading edge of non-terrestrial ...

Senior Design Engineer Department: Hardware Employment Type: Full Time Location: Cambridge Reporting To: Tom Hollis Description We are looking for multiple Senior Design Engineers who will work on revolutionary technology that is at the leading ...