4 of 4 Remote/Hybrid Tcl Jobs in England

requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such ...

NVLink, or similar. Proficiency in hardware description languages such as SystemVerilog, Verilog, or VHDL, and experience with scripting and automation tools (e.g. Python, TCL). Hands-on experience with industry-standard simulation and verification tools. Familiarity with major FPGA toolchains (e.g. Xilinx or Intel ecosystems). Exposure to embedded systems ...

SystemVerilog (incl. SVA) and UVM or equivalent methodologies Strong debugging skills across RTL and testbench environments Nice to Have Formal verification experience Scripting skills (Tcl, Perl, Python, etc.) Power-aware verification (CPF/UPF) Understanding of OOP and design patterns Additional Information Hybrid working model (typically 2+ days onsite) Candidates ...

SystemVerilog (incl. SVA) and UVM or equivalent methodologies Strong debugging skills across RTL and testbench environments Nice to Have Formal verification experience Scripting skills (Tcl, Perl, Python, etc.) Power-aware verification (CPF/UPF) Understanding of OOP and design patterns Additional Information Hybrid working model (typically 2+ days onsite) Candidates ...