15 of 15 ASIC Jobs in London

register your interest.**Purpose of role**This role leads DV activities across customer projects, serving as the principal technical planner and contributor for SoC, ASIC, and IP verification. Working closely with program management and senior DV leads to execute the full verification lifecycle for customer devices. The role requires direct ...

verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability. Key Responsibilities Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off, with potential responsibility for full-chip execution. Work on synthesis, timing ...

verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability. Key Responsibilities: Support the physical implementation of ASIC/SoC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and sign‐off. Work on synthesis, timing analysis (STA), and optimisation to achieve ...

will work on high‐bandwidth architectures involving high‐speed interfaces, precision timing, transceivers, and signal‐processing pipelines. The position requires close collaboration across FPGA, ASIC, hardware, optical, and software teams. Responsibilities Design and implement FPGA subsystems and hardware modules for high‐performance systems. Develop and optimise high‐speed interface subsystems ...

will work on high-bandwidth architectures involving high-speed interfaces, precision timing, transceivers, and signal processing pipelines. The position requires close collaboration across FPGA, ASIC, hardware, optical, and software teams. Responsibilities Design and implement FPGA subsystems and hardware modules for high-performance systems. Develop and optimise high-speed interface subsystems ...

Fractile is seeking a Senior/Principal Physical Design Engineer in Greater London. This role involves leading the physical implementation of advanced ASIC/SoC designs and collaboration with various teams to optimise performance, power, and area. The ideal candidate will possess a Bachelor's, Master ...

potential solutions and drive execution. Minimum Qualifications BSc/MSEE/M Eng/BEng or equivalent is required. Exposure in any aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place & Route and all aspects of timing, electrical and physical signoff. Preferred Qualifications Experience with ...

drive execution. Minimum Qualifications BSc/MSEE/M Eng/BEng or equivalent is required We value proven ability in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place & Route and all aspects of timing, electrical and physical signoff. Preferred Qualifications Work with ...

Group is seeking a Principal Verification Engineer to lead design verification activities for SoC, ASIC, and IP verification projects. The ideal candidate will collaborate with multi-site engineering teams, provide technical leadership, and ensure high-quality outcomes in a flexible work environment across global locations. This role requires a relevant ...

construction and collaboration with cross-functional teams to optimize chip architecture. Candidates should hold a BSc or equivalent in Engineering and have knowledge in ASIC implementation. Strong problem-solving abilities and the capability to manage design challenges are essential. Join us to craft technology for Apple’s renowned devices. #J ...

major technology company located in Greater London seeks a skilled individual in chip design and physical implementation. The position requires proven ASIC implementation abilities and experience in physical design methodologies. The ideal candidate will collaborate with teams to optimize performance and handle complex design issues in GPU technology. A strong ...

role The primary aim of this role is to lead front‐end design activities within customer projects. A lead technical planner and contributor on ASIC and IP development projects, working very closely with the programmed management and senior design leads to implement and track digital IP designs and integrate these … innovative tailored solutions that can be translated into high‐quality, achievable designs. The candidate will own and technically lead aspects of a design or ASIC/SoC integration and will lead and monitor the interactions between multi‐site engineering teams to ensure efficient communication, resolve design and methodology issues ...

looking for a Senior ASIC Design Engineer who will join a pioneering deep-tech company who are building the silicon, systems, and software that will redefine the frontier of AI. As the world’s most advanced AI models continue to scale, conventional computing infrastructure is approaching its limits. This team ...

built, architecture is evolving rapidly, and engineers are expected to contribute well beyond traditional DV boundaries. What You’ll Work On Verification of complex ASIC/processor subsystems for cutting-edge AI hardware Building verification environments and infrastructure from the ground up Developing scalable testbenches using modern software tooling Writing … engineers are deeply embedded in technical discussions and play an active role in shaping the product. What They’re Looking For Strong experience in: ASIC or processor verification Complex subsystem or core-level verification SystemVerilog and verification methodologies such as UVM or cocotb Strong Python skills and genuine software engineering ...

Resources is looking for a Senior ASIC Design Engineer to join a pioneering deep-tech company in Greater London. This role offers the chance to work on redefining AI infrastructure through innovative technology that enhances performance and lowers cost for AI workloads. Your responsibilities will include RTL Development, ensuring adherence ...