3 of 3 Remote/Hybrid Field-Programmable-Gate-Array Jobs in London

software/hardware integration and fault resolution. Knowledge of UML design techniques for software architecture. Familiarity with the full software development lifecycle. Experience with FPGA and DSP hardware. Python experience is a plus. Security Clearance: The role requires the ability to obtain UK Security Clearance (SC). ...

C++ developer to be part of the low latency development team. The team provides industry leading low-latency trading services for our clients, utilizing FPGA, C++ and Java technologies. The candidate will be focusing on the C++ components. The ideal candidate: Is motivated by working in a high performing team ...

Build and optimise high‐performance, low‐latency C++ applications Develop real‐time systems interacting directly with global exchanges Work closely with FPGA, network, and infrastructure teams Improve latency, throughput, and reliability across mission‐critical systems Contribute to performance tuning, profiling, and code reviews Skills required Exceptional modern C++ (C++17/… Experience in low‐latency, multithreaded or high‐performance environments Understanding of networking (TCP/UDP, kernel bypass, feed handlers) Bonus: experience with hardware acceleration, FPGA, or trading systems Why Join Cutting‐edge technology environment Fast‐paced engineering‐driven culture Competitive compensation and growth opportunities Apply Now: 🔗 Click the link provided ...