3 of 3 Remote UVM Jobs in London

SoC Verification Engineer. Candidates must be based in the UK, although the work can be performed remotely. Job Responsibilities Deploying Verification Methodologies such as UVM and Formal Verification Developing Testbenches and Verification Components such as UVCs, C models, and Vertical/Horizontal re-usable Verification Environments Test plan development based … for verifying complex units on SoC using industry standard tools and technologies Proficient in developing unit and subsystem level test benches using SV/UVM methodology Constrained random and Metrics driven verification Experienced with C model integration and scoreboarding FW code integration verification Experience with AMBA protocols and BUS interconnect More ❯

methodologies. The ideal candidate will be experienced in verifying complex SoC architectures, utilizing languages such as C, System Verilog (SV), and Universal Verification Methodology (UVM). This role involves close collaboration with design teams to ensure that all aspects of the SoC are thoroughly validated, from architectural design to implementation. More ❯

and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •SystemVerilog •UVM Verification •Digital verification using SystemVerilog, UVM, or cocotb •Formal Verification •Interconnect protocols such as AXI or OCP •ASIC tool flows •Familiarity with computer graphics APIs More ❯