7 of 7 Remote Verilog Jobs in London

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com JBRP1_UKTJ More ❯

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com JBRP1_UKTJ More ❯

up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers … Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com JBRP1_UKTJ More ❯

and motivated Hardware Design Engineer to join our UK GPU team. Candidates with GPU architecture or design experience are highly preferred. Responsibilities: Spec writingDevelop and implement RTL designs using Verilog/SystemVerilog/VHDL for complex digital blocks. Collaborate closely with architecture, verification, and physical design teams throughout the development cycle. Perform design synthesis, linting etc.Participate in design reviews and … years of experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL.Familiar with ASIC design flow and tools (e.g., lint, synthesis, simulation). Strong debugging and problem-solving skills. Desired Requirements: Experience with GPU design or computer graphics More ❯

in ASIC and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •FPGA Development •VHDL/Verilog •SystemVerilog •UVM Verification •Interconnect protocols such as AXI or OCP Requirements: •Be part of innovative, high-impact projects in a fast-moving industry •Collaborate with a global team of expert More ❯

tapeout on next-generation chip architectures in areas like memory, interconnect, and high-speed interface design. Key Responsibilities: + Develop and Integrate designs of RTL for digital blocks (using Verilog/SystemVerilog/VHDL) + Undertake Digital IC Design processes & Perform design synthesis, linting + Complete projects from conception to completion Skills Required: + Experience with frontend RTL Design + … Strong Experience with SystemVerilog, Verilog or VHDL + Has had exposure to ASIC design flow (Lint, syntheisis, simulation) + Digital Design Principles experience pipelining, clock domain crossing Further Details: This role offers remote working with a potential visit into the office every month. A competitive salary, bonus scheme, and a strong benefits package. If you are a driven and experienced More ❯

role involves working on FPGA-based systems with a focus on throughput, reliability, and integration within a larger hardware-software environment. Key Skills: Solid FPGA development experience VHDL or Verilog (SystemVerilog a plus) Knowledge of high-speed interfaces (e.g., PCIe, DDR, Ethernet) To Apply: Submit your CV below.. More ❯